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M62333FP 参数 Datasheet PDF下载

M62333FP图片预览
型号: M62333FP
PDF下载: 下载PDF文件 查看货源
内容描述: 8位3通道I2C总线D / A转换器与缓冲放大器 [8-bit 3ch I2C BUS D/A Converter with Buffer Amplifiers]
分类和应用: 转换器数模转换器缓冲放大器光电二极管
文件页数/大小: 10 页 / 143 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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M62333P/FP, M62338P/FP
I
2
C BUS Line Characteristics
Item
SCL clock frequency
Time the bus must be free before a new transmission can start
Hold time START condition
(After this period, the first clock pulse is generated)
Low period of the clock
High period of the clock
Set-up time for START condition
(Only relevant for a repeated START condition)
Hold time DATA
Set-up time DATA
Rise time of both SDA and SCL lines
Fall time of both SDA and SCL lines
Set-up time for STOP condition
Note:
Symbol
t
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
Min
0
4.7
4.0
4.7
4.0
4.7
0
250
4.0
Max
100
1000
300
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
Transmitter must internally provide at least a hold time to bridge the undefined region (300 ns Max) of the falling
edge of SCL.
Timing Chart
t
R
, t
F
t
BUF
V
IH
SDA
V
IL
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STA
t
SU:STO
V
IH
SCL
V
IL
t
LOW
t
HIGH
Start
Start
Stop
Start
REJ03D0865-0400 Rev.4.00 Mar 25, 2008
Page 4 of 9