The
MACE device is a slave register based peripheral.
79C940 MACE chip is
offered
Am79C940 MACE chip is
offered
in
a Plastic
Plastic
Leadless Chip Carrier (84-pin PLCC), a Plastic Quad
All transfers to and from the system are performed
Flat Package (100-pin PQFP), and a Thin Quad Flat
using simple memory or I/O read and write commands.
Package (TQFP 80-pin). There are severalengine, the
mit/
In conjunction with a user defined DMA small func-
tional and physical differences between thetailored
MACE chip provides an IEEE 802.3 interface 80-pin
TQFP and the 84-pin PLCC superior modular architec-
to a specific application. Its and 100-pin PQFP config-
urations. versatile of the smaller number of the MACE
ture and Because system interface allow pins in the
ssors
TQFP configuration versus the PLCC configuration,
device to be configured as a stand-alone device or
foura connectivity cell out. Though theintois identical
as pins are not bonded incorporated die a larger,
in all three package configurations, the removal of
integrated system.
these four pins does cause some functionality differ-
Additional features slave register over-all system
E) chip
The MACE device is aalso enhancebased peripheral.
ences between the TQFP and the PLCC and PQFP
design. The individual transmit and receive FIFOs
exibility
All transfers to and from the system are performed
configurations. Depending on the
Rev:
E
Amendment/0
application, the
Publication#
16235
optimize system overhead, providing substantial
specif-
using simple memory or I/O read and write commands.
Issue Date:
May 2000
removal of these pins will or will not have an effect.
latency during with a user defined DMA engine, the
multiple
In conjunction packet transmission and reception, and
(See section:
“Pins
Removed for TQFP Package and
minimizing intervention during normal network
NUMBER: 79C940-CI (A) REV -
or sys-
MACE chip provides an IEEE 802.3 interface tailored
SPECIFICATION
error
Page 1 of 13
Their Effects.)
recovery. The integrated Manchester encoder/decoder
, 16-bit
to a specific application. Its superior modular architec-
n exter-
ture and versatile system interface allow the MACE
eliminates the need for an external Serial Interface
With the rise of embedded networking applications op-
milar to
device to(SIA) in the node system. If support for an
Adapter be configured as a stand-alone device or
TABLE
erating in harsh environments where temperatures
5
SI and
as a connectivity cell incorporated is desired, the
external encoding/decoding scheme into a larger,
may exceed the normal commercial temperature (0
°
C
integrated system.Serial Interface (GPSI) allows direct
to +70
°
C) window, an industrial temperature (-40
°
C to
General Purpose
+85
°
C) version is available in all three packages; 84-
access to/from the MAC. In addition, the Digital Attach-
The MACE device provides a is a simplified electrical
The Am79C940 MACE and is offered in a indus-
pin PLCC, 100-pin PQFP chip 80-pin TQFP. ThePlastic
ment Interface (DAI), which complete Ethernet node
solution with specification, 10BASE-T transceiver, and
Leadless Chip Carrier (84-pin PLCC), a Plastic Quad
trial temperature version of the MACE Ethernet control-
attachment an integrated allows implementation of
Publication#
16235
Rev:
E
Amendment/0
Issue
system clocks. The MACE
supports up tonot require DC isolation between the
Flat characterized across the and a Thin Quad Flat
ler isPackage (100-pin PQFP), industrial temperature
MAUs that do 25-MHz
Date:
May 2000
device embodies theDAI port can also be used to
Package (TQFP +85
°
C) within the published power
range (-40
°
C to 80-pin). There are several small func-
MAU and DTE. The Media Access Control (MAC)
NUMBER: 79C940-CI (A) REV -
or collision status by
Page
of the IEEE
and Physical Signaling (PLS) sub-layers
1 of 13
tional and physical (4.75 V to 5.25 V; i.e., the 80-pin
supply specification differences between
±
5% V
CC
).
indicate transmit, receive,
802.3 standard, and the port. an IEEE defined Attach-
TQFP and the 84-pinof MACE performance over this
Thus, conformance PLCC and 100-pin PQFP config-
connecting LEDs to provides The MACE device also
ment Unit an External Address Detection Interface
urations. Because of the smaller number of pins inand
temperature range is guaranteed by the design the
provides Interface (AUI) for coupling to an external
Mediumto allow external hardware address filtering in
TQFP configuration versus the PLCC configuration,
characterization monitor.
(EADI) Attachment Unit (MAU). The MACE device is
compliant with 10BASE2, 10BASE5, 10BASE-T, and
four pins are not bonded out. Though the die is identical
internet working applications.
10BASE-F transceivers.
in all three package configurations, the removal of
these four pins does cause some functionality differ-
Additional features also enhance over-all system
ences between the TQFP and the PLCC and PQFP
design. The individual transmit and receive FIFOs
configurations. Depending on the application, the
optimize system overhead, providing substantial
removal of these pins will or will not have an effect.
latency during packet transmission and reception, and
(See section:
“Pins
Removed for TQFP Package and
minimizing intervention during normal network error
Their Effects.)
recovery. The integrated Manchester encoder/decoder
eliminates the need for an external Serial Interface
With the rise of embedded networking applications op-
Adapter (SIA) in the node system. If support for an
erating in harsh environments where temperatures
external encoding/decoding scheme is desired, the
may exceed the normal commercial temperature (0
°
C
to +70
°
C) window, an industrial temperature (-40
°
C to
General Purpose Serial Interface (GPSI) allows direct
+85
°
C) version is available in all three packages; 84-
access to/from the MAC. In addition, the Digital Attach-
pin PLCC, 100-pin PQFP and 80-pin TQFP. The indus-
ment Interface (DAI), which is a simplified electrical
trial temperature version of the MACE Ethernet control-
attachment specification, allows implementation of
ler is characterized across the industrial temperature
MAUs that do not require DC isolation between the
range (-40
°
C to +85
°
C) within the published power
MAU and DTE. The DAI port can also be used to
supply specification (4.75 V to 5.25 V; i.e.,
±
5% V
CC
).
indicate transmit, receive, or collision status by
Thus, conformance of MACE performance over this
connecting LEDs to the port. The MACE device also
temperature range is guaranteed by the design and
provides an External Address Detection Interface
characterization monitor.
(EADI) to allow external hardware address filtering in
internet working applications.
Sleep mode allows reduced power
Ethernet chip
The Media Access provides afor Ethernet (MACE)node
MACE device Controller complete
consump-
tion
with an integrated
powered
transceiver,
solution
for critical battery
10BASE-T
applications
and
is a CMOS VLSI device designed to provide flexibility
supports up
MHz system clock speed
The MACE
in customizedto 25-MHz system clocks.
5 MHz-25
LAN design. The MACE device is specif-
device embodiesaddress
in industrial
Controlmultiple
ically designed to the Media Access where (MAC)
Support for operation
applications
temperature
andperipherals
C to
present,
available in all three
IEEE
Physical
°
are
+85
(PLS) sub-layers of the
I/O
range (–40
Signaling
°
C)
and a centralized or sys-
802.3 standard, and provides an IEEE defined Attach-
tem specific DMA is required. The high speed, 16-bit
packages
ment Unit Interface (AUI) for is optimized for an exter-
synchronous system interface coupling to an external
Medium Attachment Unit (MAU). Theand is similar to
nal DMA or I/O processor system, MACE device is
compliant with peripheral devices, such as SCSI and
many existing 10BASE2, 10BASE5, 10BASE-T,
10BASE-F transceivers.
serial link controllers.
— Internal 10BASE-T transceiver with
automatic selection of 10BASE-T or AUI port
GENERAL DESCRIPTION
Direct slave access to all on board
10BASE-F MAU
configuration/status registers and transmit/
— DAI port to external 10BASE2, 10BASE5,
receive FlFOs
10BASE-T, 10BASE-F MAU
Direct FIFO read/write access for simple
— General Purpose Serial Interface (GPSI) to
interface to DMA controllers or l/O processors
external encoding/decoding scheme
TABLE
5 MHz-25 MHz system clock speed
Support for operation in industrial temperature
range (–40
°
C to +85
°
C) available in all three
packages
79C940
5
Specification Number 79C940B-CI (A) Rev C
Page 2 of 13
ROCHESTER [ Rochester Electronics ]
