128M DDR SDRAM
K4D261638E
AC CHARACTERISTICS (I)
-2A
-33
-36
-40
-50
Parameter
Symbol
Unit Note
Min
15
17
10
4
Max
-
Min
15
17
10
4
Max
-
Min
15
17
10
4
Max
-
Min
13
15
9
Max
-
Min
12
14
8
Max
-
Row cycle time
tRC
tCK
tCK
tCK
tCK
tCK
tCK
tCK
Refresh row cycle time
Row active time
tRFC
-
-
-
-
-
tRAS
100K
100K
100K
100K
100K
RAS to CAS delay for Read
RAS to CAS delay for Write
Row precharge time
tRCDRD
tRCDWR
tRP
-
-
-
-
-
-
-
-
-
-
-
-
4
-
-
-
-
4
-
-
-
-
2
2
2
2
2
5
5
5
4
4
Row active to Row active
Last data in to Row precharge
@Normal Precharge
tRRD
3
3
3
3
3
tWR
3
3
-
-
3
3
-
-
3
3
-
-
3
3
-
-
3
3
-
-
tCK
tCK
1
Last data in to Row precharge
@Auto Precharge
tWR_A
1
1
Last data in to Read command
Col. address to Col. address
Mode register set cycle time
Auto precharge write recovery +
Precharge
tCDLR
tCCD
tMRD
3
1
2
-
-
-
3
1
2
-
-
-
2
1
2
-
-
-
2
1
2
-
-
-
2
1
2
-
-
-
tCK
tCK
tCK
tDAL
8
-
-
-
-
8
-
-
-
-
8
-
-
-
-
7
-
-
-
-
7
-
-
-
-
tCK
tCK
ns
Exit self refresh to read command tXSR
200
3tCK
+tIS
7.8
200
3tCK
+tIS
7.8
200
3tCK
+tIS
7.8
200
3tCK
+tIS
7.8
200
3tCK
+tIS
7.8
Power down exit time
Refresh interval time
tPDEX
tREF
us
Note : 1. For normal write operation, even numbers of Din are to be written inside DRAM
AC CHARACTERISTICS (II)
(Unit : Number of Clock)
K4D261638E-TC2A
Unit
tCK
tCK
tCK
tCK
tCK
Frequency
Cas Latency
tRC
15
15
15
13
tRFC
17
17
17
15
tRAS
10
10
10
9
tRCDRD tRCDWR
tRP
tRRD
tDAL
350MHz ( 2.86ns )
300MHz ( 3.3ns )
275MHz ( 3.6ns )
250MHz ( 4.0ns )
200MHz ( 5.0ns )
4
4
4
3
3
4
4
4
4
4
2
2
2
2
2
5
5
5
4
4
3
3
3
3
3
8
8
8
7
7
12
14
8
K4D261638E-TC33
Frequency
300MHz ( 3.3ns )
275MHz ( 3.6ns )
250MHz ( 4.0ns )
200MHz ( 5.0ns )
Unit
tCK
tCK
tCK
tCK
Cas Latency
tRC
15
15
13
12
tRFC
17
17
15
14
tRAS
10
10
9
tRCDRD tRCDWR
tRP
5
5
4
4
tRRD
tDAL
4
4
3
3
4
4
4
4
2
2
2
2
3
3
3
3
8
8
7
7
8
- 14 -
Rev. 1.2 (Jul. 2003)
SAMSUNG [ SAMSUNG ]
