K7A803609B
K7A801809B
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
CS
1
H
L
L
L
L
L
L
L
X
H
X
H
X
H
X
H
CS
2
X
L
X
L
X
H
H
H
X
X
X
X
X
X
X
X
CS
2
X
X
H
X
H
L
L
L
X
X
X
X
X
X
X
X
ADSP ADSC
X
L
L
X
X
L
H
H
H
X
H
X
H
X
H
X
L
X
X
L
L
X
L
L
H
H
H
H
H
H
H
H
ADV
X
X
X
X
X
X
X
X
L
L
L
L
H
H
H
H
256Kx36 & 512Kx18 Synchronous SRAM
WRITE
X
X
X
X
X
X
L
H
H
H
L
L
H
H
L
L
CLK
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
ADDRESS ACCESSED
N/A
N/A
N/A
N/A
N/A
External Address
External Address
External Address
Next Address
Next Address
Next Address
Next Address
Current Address
Current Address
Current Address
Current Address
OPERATION
Not Selected
Not Selected
Not Selected
Not Selected
Not Selected
Begin Burst Read Cycle
Begin Burst Write Cycle
Begin Burst Read Cycle
Continue Burst Read Cycle
Continue Burst Read Cycle
Continue Burst Write Cycle
Continue Burst Write Cycle
Suspend Burst Read Cycle
Suspend Burst Read Cycle
Suspend Burst Write Cycle
Suspend Burst Write Cycle
NOTE
: 1. X means "Don′t Care".
2. The rising edge of clock is symbolized by
↑.
3. WRITE = L means Write operation in WRITE TRUTH TABLE.
WRITE = H means Read operation in WRITE TRUTH TABLE.
4. Operation finally depends on status of asynchronous input pins(ZZ and OE).
WRITE TRUTH TABLE
(x36)
GW
H
H
H
H
H
H
L
BW
H
L
L
L
L
L
X
WEa
X
H
L
H
H
L
X
WEb
X
H
H
L
H
L
X
WEc
X
H
H
H
L
L
X
WEd
X
H
H
H
L
L
X
OPERATION
READ
READ
WRITE BYTE a
WRITE BYTE b
WRITE BYTE c and d
WRITE ALL BYTEs
WRITE ALL BYTEs
Notes :
1. X means "Don′t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of CLK(↑).
WRITE TRUTH TABLE
(x18)
GW
H
H
H
H
H
L
BW
H
L
L
L
L
X
WEa
X
H
L
H
L
X
WEb
X
H
H
L
L
X
OPERATION
READ
READ
WRITE BYTE a
WRITE BYTE b
WRITE ALL BYTEs
WRITE ALL BYTEs
Notes :
1. X means "Don′t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of CLK(
↑
).
-7-
Nov. 2003
Rev 3.0
SAMSUNG [ SAMSUNG SEMICONDUCTOR ]
