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KM29W040AT 参数 Datasheet PDF下载

KM29W040AT图片预览
型号: KM29W040AT
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×8位NAND闪存 [512K x 8 bit NAND Flash Memory]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 22 页 / 359 K
品牌: SAMSUNG [ SAMSUNG SEMICONDUCTOR ]
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KM29W040AT, KM29W040AIT
AC Timing Characteristics for Command / Address / Data Input
Parameter
CLE Set-up Time
CLE Hold Time
CE Setup Time
CE Hold Time
WE Pulse Width
ALE Setup Time
ALE Hold Time
Data Set-up Time
Data Hold Time
Write Cycle Time
WE High Hold Time
Symbol
t
CLS
t
CLH
t
CS
t
CH
t
WP
t
ALS
t
ALH
t
DS
t
DH
t
WC
t
WH
Min
50
50
50
50
60
50
50
40
20
120
40
FLASH MEMORY
Max
-
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC Characteristics for Operation
Parameter
Data Transfer from Cell to Register
ALE to RE Delay
CE low to RE low (ID read)
Ready to RE Low
RE Pulse Width
WE High to Busy
Read Cycle Time
RE Access Time
RE High to Output Hi-Z
CE High to Output Hi-Z
RE High Hold Time
Output Hi-Z to RE Low
CE High to Ready(in case of interception by CE at read)
(1)
RE Low to Status Output
CE Low to Status Output
WE High to RE Low
RE access time(Read ID)
Device Resetting Time
(Read/Program/Erase)
Symbol
t
R
t
AR
t
CR
t
RR
t
RP
t
WB
t
RC
t
REA
t
RHZ
t
CHZ
t
REH
t
IR
t
CRY
t
RSTO
t
CSTO
t
WHR
t
WHRID
t
RST
Min
-
250
250
100
60
-
120
-
0
-
40
0
-
-
-
50
100
-
Max
15
-
-
-
-
200
-
50
30
50
-
-
100+tr(R/B)
(2)
60
70
-
-
5/10/500
Unit
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
NOTE
: 1. If CE goes high within 50ns after the third address input, R/B will not return to V
OL
.
2. The time to Ready depends on the value of the pull-up resistor tied R/B pin.
8