欢迎访问ic37.com |
会员登录 免费注册
发布采购

SC2516MLTRT 参数 Datasheet PDF下载

SC2516MLTRT图片预览
型号: SC2516MLTRT
PDF下载: 下载PDF文件 查看货源
内容描述: 完成三个- in-One的DDR电源解决方案通过BF_CUT [Complete Three-in-One DDR Power Solution With BF_CUT]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管双倍数据速率
文件页数/大小: 15 页 / 263 K
品牌: SEMTECH [ SEMTECH CORPORATION ]
 浏览型号SC2516MLTRT的Datasheet PDF文件第6页浏览型号SC2516MLTRT的Datasheet PDF文件第7页浏览型号SC2516MLTRT的Datasheet PDF文件第8页浏览型号SC2516MLTRT的Datasheet PDF文件第9页浏览型号SC2516MLTRT的Datasheet PDF文件第11页浏览型号SC2516MLTRT的Datasheet PDF文件第12页浏览型号SC2516MLTRT的Datasheet PDF文件第13页浏览型号SC2516MLTRT的Datasheet PDF文件第14页  
SC2516
POWER MANAGEMENT
Applications Information (Cont.)
or
Step 1. Output filter corner frequency
F
o
= 1.6 KHz
F
o
R
:=
G
pwm
V
in
G
m
F
esr
1
2
F
x_over
⎞ ⎛
V
o
F
o
⎠ ⎝
V
bg
Step 2. ESR zero frequency:
F
esr
= 3.537 KHz
when
F
esr
<
F
o
<
F
x_over
Step 3. Check the following condition:
F
esr
<
F
sw
5
(5) The compensation capacitor is determined by choos-
ing the compensator zero to be about one fifth of the
output filter corner frequency:
F zero
C
F o
5
Which is satisfied in this case.
Step 4. Choose crossover frequency and calculate
compensator R:
F
x_over
= 50 KHz
1
2
.π.
R
.
F
zero
(6) The final step is to generate the Bode plot, either by
using the simulation model in Fig. 1 or using the equa-
tions provided here with Mathcad. The phase margin
can then be checked using the Bode plot. Usually, this
design procedure ensures a healthy phase margin.
(7) An additional capacitor should be reserved at the
compensation pin to ground to have another high fre-
quency pole.
An example is given below to demonstrate the proce-
dure introduced above. The parameters of the power
supply (typical for VDDQ section) are given as :
V
in
:=
5
V
V
o
:=
2.5
V
I
o
:=
20
A
F
sw
:=
250
KHz
L
:=
2.2
⋅ µH
C
o
:=
4500
⋅ µF
R
c
:=
0.01
⋅ Ω
V
bg
:=
1.25
V
V
ramp
:=
0.55
V
G
m
:=
©
2005 Semtech Corp.
R = 15 KΩ
Step 5. Calculate the compensator C:
C = 33 nF
Step 6. Generate Bode plot and check the phase margin.
In this case, the phase margin is about 85
o
C that en-
sures the loop stability. Fig. 2 shows the Bode plot of the
loop.
Compensation design of the GMCH Channel
The configuration of the PWM comparator of GMCH
channel is such that its inverter input is connected to
Comp_GMCH and the non-inverter input is connected
to the internal ramp. The peak voltage of the internal
ramp is 1.1V and the valley voltage is 0.55V. When
COMP_GMCH voltage is below 0.55V, the maximum duty
cycle will be generated by PWM comparator. If
COMP_GMCH voltage is over 1.1V then the minimum
duty cycle will be generated.
To ensure proper soft start function of the GMCH
channel, COMP_GMCH voltage must rise above 1.1V at
the beginning of soft start period quickly. So a higher
compensation gain is required. The following example
shows that by choosing the compensation parameters
as 15kOhm and 27nF for a typical output filter with
1~2uH inductor and 2000uF capacitor (ESR of 8~12
mOhm), the circuit will yield smooth soft start, stable
control loop, and satisfactory transient response. The
measured Bode plot of the loop gain is shown in Figure
3.
10
www.semtech.com
0.001
A
V