SC2516
POWER MANAGEMENT
Application information
Description
The SEMTECH SC2516 DDR power supply controller is
the latest and most complete, Three in One switching
and linear regulator controller, providing the necessary
functions to comply with S3 and S5 sleep state signals
generated by the Desktop Computer Motherboards. The
SC2516 uses the Latched BF_CUT input signal which is
generated externally on Intel
R
P4 Motherboard glue chip
to comply with the power sequencing requirements.
Logically, the BF_CUT signal can be represented as:
Short Circuit Protection
Short circuit protection is implemented by sensing the
VDDQ output voltage. If it falls to 75% (typical) of its
nominal voltage, as sensed by the FB pin, the TG and BG
pins are latched off and the VDDQ switcher is shutdown.
It will shutdown the VTT also, since the VTT regulator is
fed from the VDDQ bus. To recover from the short circuit
protection mode, either the 5VSBY rail has to be recycled,
or the SS/EN pin must be pulled below 0.3V and
released to restart VDDQ switcher operation.
GMCH Power Section
The SC2516 Switching controller supplies a 1.5V or 1.
25V GMCH (Graphic Memory Control Hub) voltage via a
standard synchronous BUCK converter typically
connected to the 5VCC or 3.3VCC power rail from Silver-
box supply. Base on the basic advantage of switching
mode controller, The GMCH output current can support
up to 20A.
Power Sequencing
Since the Chip-Set supply should come up before the
Active Memory cycle, the GMCH supply is sequenced with
the rising edge of the P_OK signal from Sliver-box supply.
Thus the GMCH regulator drivers are on when P_OK signal
is greater than its respective threshold. The external
MOSFET gates are pulled low when P_OK signal is lower
than its threshold. Thus the GMCH is disabled during S3
and S5 (See timing diagram).
VTT Rail
The VTT termination voltage is supplied via an internal
sink/source linear regulator when BF_CUT is low, and
the P_OK signal has met its threshold voltage and SS/
EN voltage reaches to 1V. When BF_CUT is high, the VTT
termination voltage is not needed and is thus tri-stated.
The VTT linear regulator is capable of sourcing and sinking
1.8 Amps (Minimum). It is recommended that one should
use at least 470uF low ESR capacitor and 1uF ceramic
capacitor (from VTT pin to Ground with short distance)
to ensure the stable operation.
Short Circuit Protection
The VTT regulator has two internal current limit circuits,
one for the sink and one for the source regulators. Both
current limits are set at 3Amp (typical). If maintained at
current limit, the internal regulators act like constant
current sources, and supply the max current until the
device temperature raises above thermal shutdown
thresholds, at which point that regulator shuts down.
8
www.semtech.com
BF
_
CUT
=
S
3
•
P
_
OK
(For details of the Latched BF_CUT signal definition, refer
to Intel documentation).
Where S3 is the input to the Silver-box Supply for Suspend
to RAM, (S3=1 for Suspend to RAM) and P_OK is a signal
generated by the Silver-box supply, indicating that all rails
are within specification.
S3 and S5 States
During S3 and S5 sleep states, The operation of the
VDDQ and VTT is governed by the intelR specifications
with regards to the BF_CUT signal. The timing diagram
demonstrates the state of the controller and each of
the VDDQ, VTT and GMCH supplies during S3 and S5
transitions
VDDQ Power Section
SC2516 architecture eliminates the need for the Back-
Feed Cut MOSFET, since the VDDQ is always supplied
from the same input voltage bus (5V dual). The SC2516
is capable of driving a 4000pf capacitor in 25ns (typical,
top gate). This drive capability allows 15-20A DC load on
the VDDQ supply from the 5V main input rail.
Power Sequencing
Once BF_CUT signal low and P_OK signal goes high, The
VDDQ supply will be activated with S0 as well. The SS/
EN pin voltage is charged by internal constant current
source. When SS/EN voltage reaches to 0.3V (typical),
High side driver begins chopping and main power is
activated as an asynchronous Buck converter. When SS/
EN voltage reaches to 1.25V (typical), Low side driver
begins chopping and main power is activated as a
synchronous Buck converter.
When BF_CUT signal goes high (S3 state), the VDDQ
switcher is always on and is sourced by 5VSTBY rail during
this time.
When both BF_CUT and P_OK signals are low, The VDDQ
supply be disabled with S5 as well. Both high side and
low side drivers are pulled low.
©
2005 Semtech Corp.
SEMTECH [ SEMTECH CORPORATION ]
