LH28F800SU
FEATURES
8M (512K × 16, 1M × 8) Flash Memory
56-PIN TSOP
TOP VIEW
•
User-Configurable x8 or x16 Operation
•
User-Selectable 3.3 V or 5 V V
CC
•
5 V Write/Erase Operations (5 V V
PP
)
– No Requirement for DC/DC
Converter to Write/Erase
WP
WE
OE
RY/BY
DQ
15
DQ
7
DQ
14
DQ
6
GND
DQ
13
DQ
5
DQ
12
DQ
4
V
CC
GND
DQ
11
DQ
3
DQ
10
DQ
2
V
CC
DQ
9
DQ
1
DQ
8
DQ
0
A
0
BYTE
NC
NC
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
3/5
CE
1
NC
NC
A
19
A
18
A
17
A
16
V
CC
A
15
A
14
A
13
A
12
CE
0
V
PP
RP
A
11
A
10
A
9
A
8
GND
A
7
A
6
A
5
A
4
A
3
A
2
A
1
•
70 ns Maximum Access Time
•
Minimum 2.7 V Read capability
– 160 ns Maximum Access Time
(V
CC
= 2.7 V)
•
•
•
•
16 Independently Lockable Blocks
0.32 MB/sec Write Transfer Rate
100,000 Erase Cycles per Block
Revolutionary Architecture
– Pipelined Command Execution
– Write During Erase
– Command Superset of
Sharp LH28F008SA
•
5 µA (TYP.) I
CC
in CMOS Standby
•
1 µA (TYP.) Deep Power-Down
•
State-of-the-Art 0.55 µm ETOX™
Flash Technology
•
56-Pin, 1.2 mm × 14 mm × 20 mm
TSOP (Type I) Package
28F800SUR-1
Figure 1. TSOP Reverse Bend Configuration
1
SHARP [ SHARP ELECTRIONIC COMPONENTS ]
