AOC2800
Common-Drain Dual N-Channel Enhancement
Mode Field Effect Transistor
TEST CIRCUIT 1 Isss
POSITIVE VSS FOR ISSS+
NEGATIVE VSS FOR ISSS-
S2
TEST CIRCUIT 2 Igss1,2
POSITIVE VGS FOR IGSS1+
NEGATIVE VGS FOR IGSS1-
When FET1 is measured
G2
S2
A
D2
D1
VSS
between GATE and SOURCE
of FET2 are shorted
G2
D2
D1
G1
G1
A
S1
VG
S1
TEST CIRCUIT 3 Vgs
(
off
)
S2
When FET1 is measured
between GATE and SOURCE
of FET2 are shorted
G2
TEST CIRCUIT 4 Rss
(
on
)
S2
Vss/Is
A
D2
D1
VSS
G2
Is
D2
D1
G1
G1
V
VSS
VGS
S1
VGS
S1
TEST CIRCUIT 5 V
4.5V
F(SS)1,2
S2
TEST CIRCUIT 6 BV
POSITIVE VSS FOR ISSS+
NEGATIVE VSS FOR ISSS-
DSS
S2
When FET1 measured
FET2 VGS=4.5V
G2
I
F
D2
D1
G2
Is
D2
D1
G1
V
VSS
G1
V
VGS=0
S1
S1
TEST CIRCUIT 7 BV
POSITIVE VSS FOR ISSS+
NEGATIVE VSS FOR ISSS-
When FET1 is measured
GSO1,2
S2
between GATE and SOURCE
of FET2 are shorted
G2
D2
D1
G1
V
I
G
S1
5/5
www.freescale.net.cn