Rev.2.1
_00
AC Electrical Characteristics
Table 12 Test Conditions
CMOS SERIAL E
2
PROM
S-93A46A/56A/66A
Input pulse voltage
Output reference voltage
Output load
0.1
×
V
CC
to 0.9
×
V
CC
0.5
×
V
CC
100 pF
Table 13
Parameter
Symbol
V
CC
=
4.5 to 5.5 V
Min.
Typ.
Max.
V
CC
=
2.7 to 4.5 V
Min.
Typ.
Max.
Unit
CS setup time
t
CSS
0.2
—
—
0.4
—
—
µ
s
CS hold time
t
CSH
0
—
—
0
—
—
µ
s
CS deselect time
t
CDS
0.2
—
—
0.2
—
—
µ
s
Data setup time
t
DS
0.1
—
—
0.2
—
—
µ
s
Data hold time
t
DH
0.1
—
—
0.2
—
—
µ
s
Output delay time
t
PD
—
—
0.6
—
—
1.2
µ
s
*1
Clock frequency
f
SK
0
—
1.0
0
—
0.5
MHz
Clock pulse width
t
SKH
, t
SKL
0.2
—
—
0.5
—
—
µ
s
Output disable time
t
HZ1
, t
HZ2
0
—
0.2
0
—
0.5
µ
s
Output enable time
t
SV
0
—
0.15
0
—
0.5
µ
s
*1.
The clock cycle of the SK clock (frequency: f
SK
) is 1/f
SK
µ
s. This clock cycle is determined by a combination
of several AC characteristics, so be aware that even if the SK clock cycle time is minimized, the clock cycle
(1/f
SK
) cannot be made to equal t
SKL
(Min.)
+
t
SKH
(Min.).
Table 14
Parameter
Write time
Symbol
t
PR
V
CC
=
2.7 to 5.5 V
Min.
Typ.
4.0
Unit
Max.
8.0
ms
Seiko Instruments Inc.
7