C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Figure 20.10. PCA0CPMn: PCA Capture/Compare Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
-
Bit7
ECOMn
Bit6
CAPPn
Bit5
CAPNn
Bit4
MATn
Bit3
TOGn
Bit2
PWMn
Bit1
ECCFn
Bit0
00000000
SFR Address:
0xDA-0xDE
PCA0CPMn Address:
PCA0CPM0 = 0xDA (n = 0)
PCA0CPM1 = 0xDB (n = 1)
PCA0CPM2 = 0xDC (n = 2)
PCA0CPM3 = 0xDD (n = 3)
PCA0CPM4 = 0xDE (n = 4)
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
UNUSED. Read = 0, Write = don’t care.
ECOMn: Comparator Function Enable.
This bit enables/disables the comparator function for PCA module
n.
0: Disabled.
1: Enabled.
CAPPn: Capture Positive Function Enable.
This bit enables/disables the positive edge capture for PCA module
n.
0: Disabled.
1: Enabled.
CAPNn: Capture Negative Function Enable.
This bit enables/disables the negative edge capture for PCA module
n.
0: Disabled.
1: Enabled.
MATn: Match Function Enable.
This bit enables/disables the match function for PCA module
n.
When enabled, matches of
the PCA counter with a module’s capture/compare register cause the CCFn bit in
PCA0MD register to be set.
0: Disabled.
1: Enabled.
TOGn: Toggle Function Enable.
This bit enables/disables the toggle function for PCA module
n.
When enabled, matches
of the PCA counter with a module’s capture/compare register cause the logic level on the
CEXn pin to toggle.
0: Disabled.
1: Enabled.
PWMn: Pulse Width Modulation Mode Enable.
This bit enables/disables the comparator function for PCA module
n.
When enabled, a
pulse width modulated signal is output on the CEXn pin.
0: Disabled.
1: Enabled.
ECCFn: Capture/Compare Flag Interrupt Enable.
This bit sets the masking of the Capture/Compare Flag (CCFn) interrupt.
0: Disable CCFn interrupts.
1: Enable a Capture/Compare Flag interrupt request when CCFn is set.
Rev. 1.7
162
SILABS [ SILICON LABORATORIES ]
