C8051F310/1/2/3/4/5/6/7
Table 8.3. Special Function Registers
Register
Address
Description
Page
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
ACC
0xE0
0xBC
0xE8
0xC4
0xC3
0xBE
0xBD
0xC6
0xC5
0xBA
0xBB
0xF0
0x8E
0xA9
0x9B
0x9D
0x9F
0x9A
0x9C
0x9E
0x83
0x82
0xE6
0xF6
0xAA
0xB7
0xB6
0xA8
0xB8
0xE4
0xB3
0xB2
0xB1
0x80
0xF1
0xA4
0xD4
0x90
0xF2
0xA5
0xD5
0xA0
0xF3
0xA6
Accumulator
ADC0 Configuration
ADC0 Control
ADC0 Greater-Than Compare High
ADC0 Greater-Than Compare Low
ADC0 High
92
59
60
61
61
59
59
62
62
58
57
93
193
123
72
74
73
75
77
76
91
90
99
100
119
117
117
97
ADC0CF
ADC0CN
ADC0GTH
ADC0GTL
ADC0H
ADC0L
ADC0LTH
ADC0LTL
AMX0N
AMX0P
B
CKCON
CLKSEL
CPT0CN
CPT0MD
CPT0MX
CPT1CN
CPT1MD
CPT1MX
DPH
ADC0 Low
ADC0 Less-Than Compare Word High
ADC0 Less-Than Compare Word Low
AMUX0 Negative Channel Select
AMUX0 Positive Channel Select
B Register
Clock Control
Clock Select
Comparator0 Control
Comparator0 Mode Selection
Comparator0 MUX Selection
Comparator1 Control
Comparator1 Mode Selection
Comparator1 MUX Selection
Data Pointer High
DPL
EIE1
EIP1
EMI0CN
FLKEY
FLSCL
IE
Data Pointer Low
Extended Interrupt Enable 1
Extended Interrupt Priority 1
External Memory Interface Control
Flash Lock and Key
Flash Scale
Interrupt Enable
IP
Interrupt Priority
98
IT01CF
OSCICL
OSCICN
OSCXCN
P0
P0MDIN
P0MDOUT
P0SKIP
P1
P1MDIN
P1MDOUT
P1SKIP
P2
P2MDIN
P2MDOUT
INT0/INT1 Configuration
Internal Oscillator Calibration
Internal Oscillator Control
External Oscillator Control
Port 0 Latch
Port 0 Input Mode Configuration
Port 0 Output Mode Configuration
Port 0 Skip
101
122
122
125
136
136
137
137
138
138
139
139
140
140
141
Port 1 Latch
Port 1 Input Mode Configuration
Port 1 Output Mode Configuration
Port 1 Skip
Port 2 Latch
Port 2 Input Mode Configuration
Port 2 Output Mode Configuration
88
Rev. 1.7
SILICON [ SILICON ]
