C8051F336/7/8/9
7. 10-Bit ADC (ADC0, C8051F336/8 only)
The ADC0 on the C8051F336/8 is a 200 ksps, 10-bit successive-approximation-register (SAR) ADC with
integrated track-and-hold and programmable window detector. The ADC is fully configurable under soft-
ware control via Special Function Registers. The ADC0 operates in both Single-ended and Differential
modes, and may be configured to measure various different signals using the analog multiplexer described
in Section “7.4. ADC0 Analog Multiplexer (C8051F336/8 only)” on page 55. The voltage reference for the
ADC is selected as described in Section “8. Temperature Sensor (C8051F336/8 only)” on page 58. The
ADC0 subsystem is enabled only when the AD0EN bit in the ADC0 Control register (ADC0CN) is set to
logic 1. The ADC0 subsystem is in low power shutdown when this bit is logic 0.
ADC0CN
VDD
000
001
010
011
100
101
AD0BUSY (W)
Start
Conversion
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
CNVSTR Input
Timer 3 Overflow
10-Bit
SAR
AIN+
AIN-
From
AMUX0
ADC
AD0WINT
Window
Compare
Logic
32
ADC0LTH ADC0LTL
ADC0GTH ADC0GTL
ADC0CF
Figure 7.1. ADC0 Functional Block Diagram
Rev. 0.2
43
SILICON [ SILICON ]
