C8051F340/1/2/3/4/5/6/7
USB Register Definition 16.9. FRAMEL: USB0 Frame Number Low
R
Bit7
R
Bit6
R
Bit5
R
Bit4
R
Bit3
R
Bit2
R
Bit1
R
Bit0
Reset Value
Frame Number Low
00000000
USB Address:
0x0C
Bits7-0:
Frame Number Low
This register contains bits7-0 of the last received frame number.
USB Register Definition 16.10. FRAMEH: USB0 Frame Number High
R
R
R
R
R
R
Bit2
R
R
Bit0
Reset Value
-
Bit7
-
Bit6
-
Bit5
-
Bit4
-
Bit3
Frame Number High
Bit1
00000000
USB Address:
0x0D
Bits7-3:
Bits2-0:
Unused. Read = 0. Write = don’t care.
Frame Number High Byte
This register contains bits10-8 of the last received frame number.
16.8. Interrupts
The read-only USB0 interrupt flags are located in the USB registers shown in USB Register
the USB registers shown in USB Register Definition 16.14 through USB Register Definition 16.16. A USB0
interrupt is generated when any of the USB interrupt flags is set to ‘1’. The USB0 interrupt is enabled via
the EIE1 SFR (see
).
Important Note: Reading a USB interrupt flag register resets all flags in that register to ‘0’.
180
Rev. 1.0
SILABS [ SILICON LABORATORIES ]
