C8051F50x-F51x
21.1. Software Interface with the LIN Controller
The selection of the mode (Master or Slave) and the automatic baud rate feature are done though the LIN0
Control Mode (LIN0CF) register. The other LIN registers are accessed indirectly through the two SFRs
LIN0 Address (LIN0ADR) and LIN0 Data (LIN0DAT). The LIN0ADR register selects which LIN register is
targeted by reads/writes of the LIN0DAT register. The full list of indirectly-accessible LIN registers is given
in Table 21.4 on page 210.
21.2. LIN Interface Setup and Operation
The hardware based LIN controller allows for the implementation of both Master and Slave nodes with
minimal firmware overhead and complete control of the interface status while allowing for interrupt and
polled mode operation.
The first step to use the controller is to define the basic characteristics of the node:
Mode—Master or Slave
Baud Rate—Either defined manually or using the autobaud feature (slave mode only)
Checksum Type—Select between classic or enhanced checksum, both of which are implemented in hard-
ware.
21.2.1. Mode Definition
Following the LIN specification, the controller implements in hardware both the Slave and Master operating
modes. The mode is configured using the MODE bit (LIN0CF.6).
21.2.2. Baud Rate Options: Manual or Autobaud
The LIN controller can be selected to have its baud rate calculated manually or automatically. A master
node must always have its baud rate set manually, but slave nodes can choose between a manual or auto-
matic setup. The configuration is selected using the ABAUD bit (LIN0CF.5).
Both the manual and automatic baud rate configurations require additional setup. The following sections
explain the different options available and their relation with the baud rate, along with the steps necessary
to achieve the required baud rate.
21.2.3. Baud Rate Calculations: Manual Mode
The baud rate used by the LIN controller is a function of the System Clock (SYSCLK) and the LIN timing
registers according to the following equation:
SYSCLK
baud_rate
= --------------------------------------------------------------------------------------------------------------------
-
prescaler + 1
divider
multiplier + 1
2
The prescaler, divider and multiplier factors are part of the LIN0DIV and LIN0MUL registers and can
assume values in the following range:
Table 21.1. Baud Rate Calculation Variable Ranges
Factor
Range
prescaler
multiplier
divider
0…3
0…31
200…511
Important Note
: The minimum system clock (SYSCLK) to operate the LIN controller is 8 MHz.
202
Rev. 1.1
SILABS [ SILICON LABORATORIES ]
