C8051F50x-F51x
Table 21.2. Manual Baud Rate Parameters Examples
Baud (bits/sec)
20 K
Pres.
Mult.
Mult.
Div.
SYSCLK
(MHz)
19.2 K
Pres.
Mult.
Div.
9.6 K
Pres.
Mult.
Div.
4.8 K
Pres.
Mult.
Div.
1K
Pres.
Div.
25
24.5
24
22.1184
16
12.25
12
11.0592
8
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
312
306
300
276
200
306
300
276
200
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
325
319
312
288
208
319
312
288
208
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
325
319
312
288
208
319
312
288
208
3
3
3
3
3
3
3
3
3
1
1
1
1
1
0
0
0
0
325
319
312
288
208
319
312
288
208
19
19
19
19
19
19
19
19
19
1
1
1
1
1
0
0
0
0
312
306
300
276
200
306
300
276
200
21.2.4. Baud Rate Calculations—Automatic Mode
If the LIN controller is configured for slave mode, only the prescaler and divider need to be calculated:
SYSCLK
1
-
prescaler = ln ------------------------
-------
–
1
-
4000000
ln2
SYSCLK
divider = ---------------------------------------------------------------------
-
prescaler + 1
2
20000
The following example calculates the values of these variables for a 24 MHz system clock:
24000000
1
-
prescaler = ln -------------------------
-------
–
1 = 1.585
1
-
4000000
ln2
24000000
divider = --------------------------------------------- = 300
1 + 1
20000
2
204
Rev. 1.1
SILABS [ SILICON LABORATORIES ]
