C8051T600/1/2/3/4/5/6
26.3.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The Capture/Compare module high byte holds the number of PCA clocks to count before the
output is toggled. The frequency of the square wave is then defined by Equation 26.1.
F
PCA
-
F
CEXn
= ----------------------------------------
2
PCA0CPHn
Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
Equation 26.1. Square Wave Frequency Output
Where
F
PCA
is the frequency of the clock selected by the CPS2–0 bits in the PCA mode register,
PCA0MD. The lower byte of the capture/compare module is compared to the PCA counter low byte; on a
match, CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn.
Frequency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn reg-
ister. Note that the MATn bit should normally be set to 0 in this mode. If the MATn bit is set to 1, the CCFn
flag for the channel will be set when the 16-bit PCA0 counter and the 16-bit capture/compare register for
the channel are equal.
Write to
PCA0CPLn
Reset
Write to
PCA0CPHn
0
ENB
PCA0CPMn
ENB
1
P ECCMT P E
WC A A A O WC
MO P P T G MC
1 MPN n n n F
6 n n n
n
n
x
0 0 0
x
Enable
PCA0CPLn
8-bit Adder
Adder
Enable
PCA0CPHn
TOGn
Toggle
8-bit
Comparator
match
0
CEXn
1
Crossbar
Port I/O
PCA Timebase
PCA0L
Figure 26.7. PCA Frequency Output Mode
Rev. 1.2
167
SILABS [ SILICON LABORATORIES ]
