Si1010/1/2/3/4/5
1.4. Serial Ports
The Si1010/1/2/3/4/5 Family includes an SMBus/I
2
C interface, a full-duplex UART with enhanced baud
rate configuration, and two Enhanced SPI interfaces. Each of the serial buses is fully implemented in hard-
ware and makes extensive use of the CIP-51's interrupts, thus requiring very little CPU intervention.
1.5. Programmable Counter Array
An on-chip Programmable Counter/Timer Array (PCA) is included in addition to the four 16-bit general pur-
pose counter/timers. The PCA consists of a dedicated 16-bit counter/timer time base with six programma-
ble capture/compare modules. The PCA clock is derived from one of six sources: the system clock divided
by 12, the system clock divided by 4, Timer 0 overflows, an External Clock Input (ECI), the system clock, or
the external oscillator clock source divided by 8. ‘F912 and ‘F902 devices also support a SmaRTClock
divided by 8 clock source.
Each capture/compare module can be configured to operate in a variety of modes: edge-triggered capture,
software timer, high-speed output, pulse width modulator (8, 9, 10, 11, or 16-bit), or frequency output. Addi-
tionally, Capture/Compare Module 5 offers watchdog timer (WDT) capabilities. Following a system reset,
Module 5 is configured and enabled in WDT mode. The PCA Capture/Compare Module I/O and External
Clock Input may be routed to Port I/O via the Digital Crossbar.
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
External Clock/8
SmaRTClock/8
PCA
CLOCK
MUX
16-Bit Counter/Timer
Capture/Compare
Module 0
Capture/Compare
Module 1
Capture/Compare
Module 2
Capture/Compare
Module 3
Capture/Compare
Module 4
Capture/Compare
Module 5 / WDT
CEX0
CEX1
CEX2
CEX3
CEX4
CEX5
ECI
Crossbar
Port I/O
Figure 1.10. PCA Block Diagram
Rev. 1.0
27
SILABS [ SILICON LABORATORIES ]
