Si102x/3x
13. DMA-Enabled Cyclic Redundancy Check Module (CRC1)
Si102x/3x devices include a DMA-enabled cyclic redundancy check module (CRC1) that can perform a
CRC of data using an arbitrary 16-bit polynomial. This peripheral can compute CRC results using direct
DMA access to data in XRAM.
Using a DMA transfer provides much higher data throughput than using SFR access. Since the CPU can
be in Idle mode while the CRC is calculated, CRC1 also provides substantial power savings. The CRC1
module is not restricted to a limited list of fixed polynomials. Instead, the user can specify any valid 16-bit
polynomial.
CRC1 accepts a stream of 8-bit data written to the CRC1IN register. A DMA transfer can be used to auton-
omously transfer data from XRAM to the CRC1IN SFR. The CRC1 module may also be used with SFR
access by writing directly to the CRC1IN SFR. After each byte is written, the CRC resultant is updated on
the CRC1OUTH:L SFRs. After writing all data bytes, the final CRC results are available from the
CRC1OUTH:L registers. The final results may be flipped or inverted using the FLIP and INV bits in the
CRC1CN SFR. The initial seed value can be reset to 0x0000 or seeded with 0xFFFF.
13.1. Polynomial Specification
The arbitrary polynomial should be written to the CRC1POLH:L SFRs before writing data to the CRCIN
SFR.
A valid 16-bit CRC polynomial must have an x
16
term and an x
0
term. Theoretically, a 16-bit polynomial
might have 17 terms total. However, the polynomial SFR is only 16-bits wide. The convention used is to
omit the x
16
term. The polynomial should be written in big endian bit order. The most significant bit corre-
sponds to the highest order term. Thus, the most significant bit in the CRC1POLL SFR represents the x
15
term, and the least significant bit in the CRC1POLH SFR represents the x
0
term. The least significant bit of
CRC1POLL should always be set to one. The CRC results are undefined if this bit is cleared to a zero.
16
+ x
12
+ x
5
+ 1, or
0x1021.
CRC1POLH:L
= 0x1021
CRC1POLH
1
7
0
6
0
5
0
4
1
3
0
2
0
1
0
0
0
7
0
6
0
5
1
CRC1POLL
4
0
3
0
2
0
1
0
0
1
x
16
+
x
12
+
x
5
+
1
Figure 13.1. Polynomial Representation
Rev. 0.3
169
SILABS [ SILICON LABORATORIES ]
