Si3056
Si3018/19/10
Table 4. AC Characteristics
(VD = 3.0 to 3.6 V, TA = 0 to 70 °C; see Figure 17 on page 18)
Parameter
Symbol
Test Condition
Fs = F /5120
Min
7.2
—
Typ
Max
16
—
Unit
kHz
MHz
Hz
1
Sample Rate
Fs
—
PLL2
1
PLL Output Clock Frequency
F
F
= (F x M)/N
MCLK
98.304
PLL1
PLL1
Transmit Frequency Response
Receive Frequency Response
Low –3 dBFS Corner
—
0
5
—
Low –3 dBFS Corner,
FILT = 0
—
—
Hz
Receive Frequency Response
Low –3 dBFS Corner,
—
200
—
Hz
11
FILT = 1
2,3
Transmit Full Scale Level
V
FULL = 0 (0 dBm)
—
—
—
1.1
1.58
2.16
1.1
—
—
—
V
FS
FS
PEAK
PEAK
PEAK
PEAK
PEAK
11
FULL = 1 (3.2 dBm)
V
V
V
V
V
FULL2 = 1 (6.0 dBm)
FULL = 0 (0 dBm)
2,4
Receive Full Scale Level
V
11
FULL = 1 (3.2 dBm)
—
—
—
1.58
2.16
80
—
—
—
FULL2 = 1 (6.0 dBm)
PEAK
5,6,7
Dynamic Range
DR
DR
ILIM = 0, DCV = 11, DCR = 0,
dB
I = 100 mA, MINI = 00
L
5,6,7
Dynamic Range
ILIM = 0, DCV = 00, DCR = 0,
—
—
—
—
80
80
—
—
—
—
dB
dB
dB
dB
I = 20 mA, MINI = 11
L
5,6,7
Dynamic Range
DR
ILIM = 1, DCV = 11, DCR = 0,
I = 50 mA, MINI = 00
L
Transmit Total Harmonic
THD
THD
ILIM = 0, DCV = 11, DCR = 0,
–72
–78
8,9
Distortion
I = 100 mA, MINI = 00
L
Transmit Total Harmonic
ILIM = 0, DCV = 00, DCR = 0,
8,9
Distortion
I = 20 mA, MINI = 11
L
Notes:
1. See Figure 26 on page 37.
2. Measured at TIP and RING with 600 Ω termination at 1 kHz, as shown in Figure 1.
3. With FULL = 1, the transmit and receive full scale level of +3.2 dBm can be achieved with a 600 Ω ac termination, while
the transmit and receive level in dBm varies with reference impedance, the DAA will transmit and receive 1 dBV into all
reference impedances in “FULL” mode. With FULL2 = 1, the transmit and receive full scale level of +6.0 dBm can be
achieved with a 600 Ω ac termination. In “FULL2” mode, the DAA will transmit and receive +1.5 dBV into all reference
impedances.
4. Receive full scale level produces –0.9 dBFS at SDO.
5. DR = 20 x log (RMS VFS/RMS VIN).+ 20 x log (RMS VIN/RMS noise). The RMS noise measurement excludes
harmonics. VFS is the 0 dBm full-scale level.
6. Measurement is 300 to 3400 Hz. Applies to both transmit and receive paths. VIN = 1 kHz, –3 dBFS, Fs = 10300 Hz.
7. When using the Si3010 line-side, the typical DR values will be approximately 10 dB lower.
8. THD = 20 x log (RMS distortion/RMS signal). VIN = 1 kHz, –3 dBFS, Fs = 10300 Hz.
9. When using the Si3010 line-side, the typical THD values will be approximately 10 dB higher.
10. DRCID = 20 x log (RMS VCID/RMS VIN) + 20 x log(RMS VIN/RMS noise). VCID is the 6 V full-scale level for the typical
application circuit in Figure 17. With the enhanced CID circuit, the VCID full-scale level is 1.5 V peak, and DRCID
increases to 62 dB.
11. Available on the Si3019 line-side device only.
8
Rev. 1.05
SILICON [ SILICON ]
