Si5338
8. Device Pinout by Part Number
The Si5338 is orderable in three different speed grades: Si5338A/D/G/K/N have a maximum output clock
frequency limit of 710 MHz. Si5338B/E/H/L/P have a maximum output clock frequency of 350 MHz. Si5338C/F/J/
M/Q have a maximum output clock frequency of 200 MHz.
Devices are also orderable according to the pin control functions available on Pins 3 and 4:
CLKIN—single-ended
clock input
I2C_LSB—determines
the LSB bit of the 7-bit I
2
C address
FINC—frequency
increment pin
FDEC—frequency
decrement pin
PINC—phase
increment pin
PDEC—phase
decrement pin
FDBK—single-ended
feedback input
OEB—output
enable
Table 18. Pin Function by Part Number
Pin #
Si5338A: 710 MHz Si5338D: 710 MHz Si5338G: 710 MHz Si5338K: 710 MHz Si5338N: 710 MHz
Si5338B: 350 MHz Si5338E: 350 MHz Si5338H: 350 MHz Si5338L: 350 MHz Si5338P: 350 MHz
Si5338C: 200 MHz Si5338F: 200 MHz Si5338J: 200 MHz Si5338M: 200 MHz Si5338Q: 200 MHz
CLKIN
CLKINB
1
CLKIN
I2C_LSB
FDBK
FDBKB
4
VDD
INTR
CLK3B
CLK3A
VDDO3
SCL
CLK2B
CLK2A
VDDO2
VDDO1
CLKIN
CLKINB
1
PINC
PDEC
FDBK
4
FDBKB
4
VDD
INTR
CLK3B
CLK3A
VDDO3
SCL
CLK2B
CLK2A
VDDO2
VDDO1
CLKIN
1
CLKINB
1
FINC
FDEC
FDBK
4
FDBKB
4
VDD
INTR
CLK3B
CLK3A
VDDO3
SCL
CLK2B
CLK2A
VDDO2
VDDO1
CLKIN
1
CLKINB
OEB
I2C_LSB
FDBK
4
FDBKB
VDD
INTR
CLK3B
CLK3A
VDDO3
SCL
CLK2B
CLK2A
VDDO2
VDDO1
CLKIN
1
CLKINB
CLKIN
2
FDBK
3
FDBK
4
FDBKB
4
VDD
INTR
CLK3B
CLK3A
VDDO3
SCL
CLK2B
CLK2A
VDDO2
VDDO1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Notes:
1.
CLKIN/CLKINB on pins 1 and 2 are differential clock inputs or XTAL inputs.
2.
CLKIN on pin 3 is a single-ended clock input.
3.
FDBK on pin 4 is a single-ended feedback input.
4.
FDBK/FDBKB on pins 5 and 6 are differential feedback inputs.
164
Rev. 0.6
SILABS [ SILICON LABORATORIES ]
