Si8430/31/35
Table 4. Electrical Characteristics
(V
DD1
= 3.3 V ±10%, V
DD2
= 3.3 V ±10%, T
A
= –40 to 125 ºC; applies to narrow and wide-body SOIC packages)
Parameter
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current
Output Impedance
1
Enable Input High Current
Enable Input Low Current
Symbol
V
IH
V
IL
V
OH
V
OL
I
L
Z
O
I
ENH
I
ENL
Test Condition
Min
2.0
—
Typ
—
—
3.1
0.2
—
85
2.0
2.0
Max
—
0.8
—
0.4
±10
—
—
—
Unit
V
V
V
V
µA
µA
µA
loh = –4 mA
lol = 4 mA
V
DD1
,V
DD2
– 0.4
—
—
—
V
ENx
= V
IH
V
ENx
= V
IL
—
—
DC Supply Current
(All inputs 0 V or at supply)
Si8430Ax, Bx and Si8435Bx
V
DD1
V
DD2
V
DD1
V
DD2
Si8431Ax, Bx
V
DD1
V
DD2
V
DD1
V
DD2
Si8430Ax, Bx and Si8435Bx
V
DD1
V
DD2
Si8431Ax, Bx
V
DD1
V
DD2
All inputs 0 DC
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
All inputs 0 DC
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
—
—
—
—
—
—
—
—
1.2
1.9
4.2
1.9
1.7
2.0
3.7
3.0
1.8
2.9
6.3
2.9
2.6
3.0
5.6
4.5
mA
mA
1 Mbps Supply Current
(All inputs = 500 kHz square wave, CI = 15 pF on all outputs)
—
—
—
—
2.7
2.2
2.8
2.7
4.1
3.3
4.2
4.1
mA
mA
Notes:
1.
The nominal output impedance of an isolator driver channel is approximately 85
,
±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2.
t
PSK(P-P)
is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3.
See "3. Errata and Design Migration Guidelines" on page 25 for more details.
4.
Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.5
9
SILABS [ SILICON LABORATORIES ]
