Si8610/20/21/22
Table 2. Electrical Characteristics (Continued)
(V
DD1
= 5 V ±10%, V
DD2
= 5 V ±10%, T
A
= –40 to 125 ºC)
Parameter
All Models
Output Rise Time
Output Fall Time
Peak Eye Diagram Jitter
Common Mode Transient
Immunity
Startup Time
Symbol
Test Condition
Min
Typ
Max
Unit
t
r
t
f
t
JIT(PK)
CMTI
t
SU
C
L
= 15 pF
See Figure 1
C
L
= 15 pF
See Figure 1
See Figure 6
V
I
= V
DD
or 0 V
—
—
—
35
—
2.5
2.5
350
50
15
4.0
4.0
—
—
40
ns
ns
ps
kV/µs
µs
Notes:
1.
The nominal output impedance of an isolator driver channel is approximately 50
,
±40%, which is a
combination of the value of the on-chip series termination resistor and channel resistance of the output driver
FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately
terminated with controlled impedance PCB traces.
2.
t
PSK(P-P)
is the magnitude of the difference in propagation delay times measured between different units
operating at the same supply voltages, load, and ambient temperature.
3.
Start-up time is the time period from the application of power to valid data at the output.
1.4 V
Typical
Input
t
PLH
90%
1.4 V
Typical
Output
10%
10%
90%
t
PHL
t
r
t
f
Figure 1. Propagation Delay Timing
Rev. 1.3
7
SILABS [ SILICON LABORATORIES ]
