SiM3C1xx
4.2. I/O
4.2.1. General Features
The SiM3C1xx ports have the following features:
Push-pull
or open-drain output modes and analog or digital modes.
Option for high or low output drive strength.
Port Match allows the device to recognize a change on a port pin value.
Internal pull-up resistors are enabled or disabled on a port-by-port basis.
Two external interrupts with up to 16 inputs provide monitoring capability for external signals.
Internal Pulse Generator Timer (PB2 only) to generate simple square waves.
A subset of pins can also serve as inputs to the Port Mapped Level Shifters available on the High Drive
Pins.
4.2.2. High Drive Pins (PB4)
The High Drive pins have the following additional features:
Programmable
safe state: high, low, or high impedance.
Programmable drive strength and slew rates.
Programmable current limiting.
Powered from a separate source (VIOHD, which can be up to 6 V) from the rest of the device.
Supports various functions, including GPIO, UART1 pins, EPCA0 pins, or Port Mapped Level Shifting.
4.2.3. 5 V Tolerant Pins (PB3)
The 5 V tolerant pins can be connected to external circuitry operating at voltages above the device supply without
needing extra components to shift the voltage level.
4.2.4. Crossbars
The SiM3C1xx devices have two Crossbars with the following features:
peripheral assignment to port pins.
Pins can be individually skipped to move peripherals as needed for design or layout considerations.
The Crossbars have a fixed priority for each I/O function and assign these functions to the port pins. When a digital
resource is selected, the least-significant unassigned port pin is assigned to that resource. If a port pin is assigned,
the Crossbars skip that pin when assigning the next selected resource. Additionally, the Crossbars will skip port
pins whose associated bits in the PBSKIPEN registers are set. This provides some flexibility when designing a
system: pins involved with sensitive analog measurements can be moved away from digital I/O and peripherals
can be moved around the chip as needed to ease layout constraints.
Flexible
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Preliminary Rev. 0.8
SILABS [ SILICON LABORATORIES ]
