SC73C1402
FUNCTION DESCRIPTION
1. PC: 11 bits
PC refers to program counter. The maximum addressing area is 2K bytes in ROM. The program counter
contains the address of the instruction that will be executed next. When reset, the value of the PC is cleared to
0. The PC is set to predefined value when one of the 3 following occasions occurs: 1) when the JUMP
instruction is executed; 2) when a subroutine call is back; 3) when a program call is back. In the SC73C1402,
all instructions are 1•byte OP Code instructions, PC increments by 1 each time an instruction is executed.
2. MBR
Memory buffer register (MBR) is the write•only, higher 4•bit of the program pointer. The ROM of the
SC73C1402 can be divided into 16 blocks. Each block has 128 bytes. These blocks can be addressed by the
MBR. When the program starts executing a branch instruction, it will load the corresponding value to the MBR
register, and then executes the command BSS label.
3. STACK
STACK refers to stack register (11 bits). It stores the previous value of program pointer during execution of
subroutine calls. Because there is only one•level hardware stack register, only one•level programs can be
called. When the user tries to make a nested two•level program call, an error will occur.
4. B, H, D
BHD refers to the pointers to data table. They are all 4•bit. The last 1K•byte area of ROM (400H~7FFH) can
also be used for data table. When addressing the data of the program in ROM, the registers act as the
pointers to the data table. In other cases, the H, D registers can be used as general purpose registers. Data
stored in the data table can be addressed by the 2 transmit instructions (see the following 2 instructions: LDL
A, @HD, and LDH A, @HD. When executing the above 2 transmit•instructions, the program searches the data
in the data table automatically. The lower 10•bit of the ROM is decided by the lower 2•bit of the B register, and
all bits of the H & D register.
When the BR [3] of B register is set to “1”, the carrier duty is 1/2; when BR [3] is set to “0”, then the carrier
duty is 1/3.
The BR [2] of B register is “1”, the carrier output port is opened, if BR [2]=0, the carrier output port is closed.
5. ROM
Address
000H
2k x 9bits
Reset address
001H
002H
Subroutine address
Program address
01FH
020H
3FFH
400H
Data table and program multiplex areas
7FFH
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
REV:1.1
2005.12.19
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