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SP703EN 参数 Datasheet PDF下载

SP703EN图片预览
型号: SP703EN
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗微处理器监控与电池切换 [Low Power Microprocessor Supervisory with Battery Switch-Over]
分类和应用: 电源电路电池电源管理电路微处理器光电二极管监控
文件页数/大小: 16 页 / 219 K
品牌: SIPEX [ SIPEX CORPORATION ]
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FEATURES
The
SP703/704
devices provide four key func-
tions:
1. A battery backup switching for CMOS RAM,
CMOS microprocessors, or other logic.
2. A reset output during power-up, power-down
and brownout conditions.
3. A reset pulse if the manual reset has been
pulled below 0.8V for at least 150ns.
4. A 1.25V threshold detector for power-fail
warning, low battery detection, or to monitor a
power supply other than +5V.
The
SP703/704
devices differ only in their
supply voltage monitor level. The
SP703
generates a reset when V
CC
drops below 4.65V
while the
SP704
generates a reset below 4.4V.
The
SP703/704
devices are ideally suited for
applications in automotive systems, intelligent
instruments, and battery-powered computers and
controllers. All designs into an environment
where it is critical to monitor the power supply
to the
µP
and its related digital components will
find the
SP703/704
ideal.
THEORY OF OPERATION
Reset Output
The microprocessor's (µP's) reset input starts
the
µP
in a known state. When the
µP
is in an
unknown state, it should be held in reset. The
SP703/704
assert reset during power-up and
prevent code execution errors during power-
down or brownout conditions.
On power-up, once V
CC
reaches 1V, RESET is
guaranteed to be a logic low. As V
CC
rises,
RESET remains low. When V
CC
exceeds the
reset threshold, RESET will remain low for
200ms,
Figure 9.
If a brownout condition
occurs and V
CC
dips below the reset threshold,
RESET is triggered. Each time RESET is trig-
gered, it stays low for the reset pulse width
interval. If a brownout condition interrupts a
previously initiated reset pulse, the reset pulse
continues for another 200ms. On power-down,
once V
CC
goes below the threshold, RESET is
guaranteed to be logic low until V
CC
drops
below 1V. RESET is also triggered by a
manual reset
Regulated +5V
Unregulated
DC
V
CC
µP
RESET
NMI
RESET
PFO
MR
GND
BUS
V
CC
0.1µF
R
1
PFI
R
2
V
BATT
V
OUT
GND
Pushbutton
Switch
V
CC
CMOS
RAM
GND
3.6V
Lithium
Battery
Figure 8. Typical Operating Circuit
SP703/704DS/07
SP703/704 Low Power Microprocessor Supervisory
© Copyright 2000 Sipex Corporation
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