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SL74HC651 参数 Datasheet PDF下载

SL74HC651图片预览
型号: SL74HC651
PDF下载: 下载PDF文件 查看货源
内容描述: 八路三态总线收发器和D触发器(高性能硅栅CMOS ) [Octal 3-State Bus Transceivers and D Flip-Flops(High-Performance Silicon-Gate CMOS)]
分类和应用: 总线收发器触发器
文件页数/大小: 9 页 / 82 K
品牌: SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
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SL74HC651
FUNCTION TABLE
Dir.
L
OE
H
CAB CBA SAB SBA
X
X
X
X
X
X
A
INPUTS
Z
INPUTS
B
INPUTS
Z
INPUTS
FUNCTION
Both the A bus and the B bus are inputs.
The output functions of the A and B bus
are disabled.
Both the A and B bus are used for inputs
to the internal flip-flops. Data at the bus
will be stored on low to high transition of
the clock inputs.
The A bus are outputs and the B bus are
inputs.
The data at the B bus are displayed at the
A bus.
The data at the B bus are displayed at the
A bus. The data of the B bus are stored to
the internal flip-flops on low to high
transition of the clock pulse.
The data stored to the internal flip-flops,
are displayed at the A bus.
The data at the B bus are stored to the
internal flip-flops on low to high transition
of the clock pulse. The states of the
internal flip-flops output directly to the A
bus.
OUTPUTS
X
*
L
L
X
*
X
X
X
L
L
H
L
H
L
INPUTS
L
H
L
H
X
*
X
*
X
X
X
H
H
Qn
L
H
X
H
L
INPUTS
X
H
H
X
*
X
*
L
L
X
X
H
L
H
L
OUTPUTS The A bus are inputs and the B bus are
outputs.
L
H
L
H
The data at the A bus are displayed at the
B bus.
The data at the B bus are displayed at the
A bus. The data of the B bus are stored to
the internal flip-flops on low to high
transition of the clock pulse.
The data stored to the internal flip-flops
are displayed at the B bus.
The data at the A bus are stored to the
internal flip-flops on low to high transition
of the clock pulse. The states of the
internal flip-flops output directly to the B
bus.
The data stored to the internal flip-flops
are displayed at the A and B bus
respectively.
The output at the A bus are displayed at
the B bus, the output at the B bus are
displayed at the A bus respec.
X
X
*
X
*
H
H
X
X
X
H
L
Qn
L
H
OUTPUTS
H
L
X
X
H
H
Qn
OUTPUTS Both the A bus and the B bus are outputs
Qn
H
H
Qn
Qn
X : DON’T CARE
Z : HIGH IMPEDANCE
Qn : THE DATA STORED TO THE INTERNAL FLIP-FLOPS BY MOST RECENT LOW TO HIGH TRANSITION
OF THE CLOCK INPUTS
*
: THE DATA AT THE A AND B BUS WILL BE STORED TO THE INTERNAL FLIP-FLOPS ON EVERY LOW TO
TRANSITION OF THE CLOCK INPUTS
SLS
System Logic
Semiconductor