Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Chapter 5 System Management Bus Interface Protocol
5.1
Communications Protocol
The EMC1413 / EMC1414 communicates with a host controller, such as an SMSC SIO, through the
SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its
peripheral devices. A detailed timing diagram is shown in
For the first 15ms after power-up the device may not respond to SMBus communications.
.
T
LOW
T
HIGH
T
HD:STA
T
SU:STO
T
FALL
SMCLK
T
RISE
T
SU:DAT
T
SU:STA
T
HD:STA
T
HD:DAT
SMDATA
T
BUF
P
S
S - Start Condition
S
P - Stop Condition
P
Figure 5.1 SMBus Timing Diagram
5.1.1
SMBus Start Bit
The SMBus Start bit is defined as a transition of the SMBus Data line from a logic ‘1’ state to a logic
‘0’ state while the SMBus Clock line is in a logic ‘1’ state.
5.1.2
SMBus Address and RD / WR Bit
The SMBus Address Byte consists of the 7-bit client address followed by the RD / WR indicator bit. If
this RD / WR bit is a logic ‘0’, the SMBus Host is writing data to the client device. If this RD / WR bit
is a logic ‘1’, the SMBus Host is reading data from the client device.
The EMC1413-A and EMC1414-A SMBus slave address is determined by the pull-up resistor on the
THERM pin as shown in
The Address decode is performed by pulling known currents from VDD through the external resistor
causing the pin voltage to drop based on the respective current / resistor relationship. This pin voltage
is compared against a threshold that determines the value of the pull-up resistor.
Table 5.1 SMBus Address Decode
PULL UP RESISTOR ON
THERM PIN (±5%)
4.7k
6.8k
10k
SMBUS ADDRESS
1111_100(r/w)b
1011_100(r/w)b
1001_100(r/w)b
SMSC EMC1413 / EMC1414
13
Revision 1.41 (02-23-12)
DATASHEET
SMSC [ SMSC CORPORATION ]
