RPM-Based Fan Controller with HW Thermal Shutdown
Datasheet
Bit 0 - POLARITY1 - Determines the polarity of PWM1 (if enabled).
‘0’ (default) - the Polarity of the PWM driver is normal. A drive setting of 00h will cause the output
to be set at 0% duty cycle and a drive setting of FFh will cause the output to be set at 100% duty
cycle.
‘1’ - The Polarity of the PWM driver is inverted. A drive setting of 00h will cause the output to be
set at 100% duty cycle and a drive setting of FFh will cause the output to be set at 0% duty cycle.
6.18
PWM Base Frequency Register
Table 6.24 PWM Base Frequency Register
ADDR
2Bh
R/W
R/W
REGISTER
PWM Base
Frequency
B7
-
B6
-
B5
-
B4
-
B3
-
B2
-
B1
B0
DEFAULT
03h
PWM_BASE[1:0
]
The PWM Base Frequency Register controls base frequency of the PWM output.
Bits 1-0 - PWM_BASE[1:0] - Determines the base frequency of the PWM driver (PWM).
Table 6.25 PWM_BASEx[1:0] it Decode
PWM_BASE[1:0]
1
0
0
1
1
0
0
1
0
1
BASE FREQUENCY
26.00kHz
19.531kHz
4,882Hz
2,441Hz (default)
6.19
Limit Registers
Table 6.26 Limit Registers
ADDR
30h
31h **
32h **
34h
38h
R/W
R/W
R/W
R/W
R/W
R/W
REGISTER
External Diode
1 High Limit
External Diode
2 High Limit **
External Diode
3 High Limit **
Internal Diode
High Limit
External Diode
1 Low Limit
B7
Sign
Sign
Sign
Sign
Sign
B6
64
64
64
64
64
B5
32
32
32
32
32
B4
16
16
16
16
16
B3
8
8
8
8
8
B2
4
4
4
4
4
B1
2
2
2
2
2
B0
1
1
1
1
1
DEFAULT
55h
(+85°C)
55h
(+85°C)
55h
(+85°C)
55h
(+85°C)
00h
(0°C)
SMSC EMC2103
53
Revision 0.85 (01-29-08)
DATASHEET
SMSC [ SMSC CORPORATION ]
