RPM-Based Fan Controller with HW Thermal Shutdown
Datasheet
6.35
GPIO Output Configuration Register (EMC2103-2 Only)
Table 6.51 GPIO Output Configuration Register
ADDR
R/W
REGISTER
GPIO
Output
Config
B7
B6
B5
B4
B3
B2
B1
GPIO
2_OT
B0
GPIO
1_OT
DEFAULT
E2
R/W
-
00h
The GPIO Output Configuration Register controls the output pin type of each GPIO pin.
Bit 1 - GPIO2_OT - Determines the output type for GPIO2.
‘0’ (default) - GPIO2 is configured as an open drain output (if enabled as an output).
‘1’ - GPIO2 is configured as a push-pull output (if enabled as an output).
Bit 0 - GPIO1_OT - Determines the output type for GPIO1.
‘0’ (default) - GPIO1 is configured as an open drain output (if enabled as an output).
‘1’ - GPIO1 is configured as a push-pull output (if enabled as an output).
6.36
GPIO Input Register (EMC2103-2 Only)
Table 6.52 GPIO Input Register
ADDR
E3h
R/W
R
REGISTER
GPIO Input
B7
-
B6
-
B5
B4
B3
B2
B1
GPIO
2_IN
B0
GPIO
1_IN
DEFAULT
00h
The GPIO Input Register indicates the state of the corresponding GPIO pin. When a GPIO is
configured as an input, any change of state will assert the ALERT# pin (unless GPIO interrupts are
masked, see
Bit 1 - GPIO2_IN - Indicates the pin state of the GPIO2 pin regardless of the pin functionality.
Bit 0 - GPIO1_IN - Indicates the pin state of the GPIO1 pin regardless of the pin functionality.
6.37
GPIO Output Register (EMC2103-2 Only)
Table 6.53 GPIO Output Register
ADDR
E4h
R/W
R/W
REGISTER
GPIO
Output 1
B7
-
B6
-
B5
B4
B3
B2
B1
GPIO2
_OUT
B0
GPIO1
_OUT
DEFAULT
00h
The GPIO Output Register controls the state of the corresponding pins when they are configured as
outputs.
If the output is configured as an open-drain output, then it requires a pull-up resistor to VDD. Setting
the corresponding bit to a ‘1’ will act to disable the output allowing the pull-up resistor to pull the output
high. Setting the corresponding bit to a ‘0’ will enable the output and drive the pin to a logical ‘0’ state.
Revision 0.85 (01-29-08)
66
SMSC EMC2103
DATASHEET
SMSC [ SMSC CORPORATION ]
