High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
Table 5.40 Register 6 - Auto Negotiation Expansion
ADDRESS
NAME
Reserved
DESCRIPTION
MODE DEFAULT
6.15:5
6.4
RO
0
0
Parallel Detection
Fault
1 = fault detected by parallel detection logic
0 = no fault detected by parallel detection logic
RO/
LH
6.3
6.2
6.1
6.0
Link Partner Next
Page Able
1 = link partner has next page ability
RO
0
0
0
0
0 = link partner does not have next page ability
Next Page Able
1 = local device has next page ability
RO
0 = local device does not have next page ability
Page Received
1 = new page received
RO/
LH
0 = new page not yet received
Link Partner Auto- 1 = link partner has auto-negotiation ability
RO
Negotiation Able
0 = link partner does not have auto-negotiation ability
Table 5.41 Register 16 - Silicon Revision
DESCRIPTION
ADDRESS
NAME
MODE DEFAULT
16.15:10
16.9:6
Reserved
RO
RO
RO
0
Silicon Revision
Reserved
Four-bit silicon revision identifier.
0001
0
16.5:0
Table 5.42 Register 17 - Mode Control/Status
ADDRESS
NAME
DESCRIPTION
MODE DEFAULT
17.15
17.14
Reserved
FASTRIP
Write as 0; ignore on read.
RW
0
0
10Base-T fast mode:
0 = normal operation
1 = Reserved
RW,
NASR
Must be left at 0
17.13
EDPWRDOWN
Enable the Energy Detect Power-Down mode:
0 = Energy Detect Power-Down is disabled
1 = Energy Detect Power-Down is enabled
RW
0
17.12
17.11
Reserved
Write as 0, ignore on read
RW
RW
0
0
LOWSQEN
The Low_Squelch signal is equal to LOWSQEN AND
EDPWRDOWN.
Low_Squelch = 1 implies a lower threshold
(more sensitive).
Low_Squelch = 0 implies a higher threshold
(less sensitive).
17.10
17.9
MDPREBP
Reserved
Management Data Preamble Bypass:
0 – detect SMI packets with Preamble
1 – detect SMI packets without preamble
RW
RW
0
0
Reserved
Must be left at 0
Rev. 0.8 (11-16-04)
SMSC LAN83C185
DATA3S8HEET
SMSC [ SMSC CORPORATION ]
