LAN9303 参数 Datasheet PDF下载

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII

Datasheet

re-runs the Auto-negotiation using the new default values of the

register to determine the new Auto-negotiation results.

Note:

Each of these PHY registers is written in its entirety, overwriting any previously changed bits.

Following the writes to the PHY registers, the PMI registers are reset back to their default values.

8.4.4.2

Virtual PHY Registers Synchronization

Some PHY register defaults are based on configuration straps. In order to maintain consistency

between the updated configuration strap registers and the Virtual PHY registers, the

, a n d

are written when the EEPROM Loader is run.

The

is written with the new

defaults as detailed in

The

is written

with the new defaults as detailed in

The

is written with the new defaults as

detailed in

Additionally, the

bit is set in this register. This re-runs the

Auto-negotiation using the new default values of the

register to determine the new Auto-negotiation results.

Note:

Each of these VPHY registers is written in its entirety, overwriting any previously changed bits.

8.4.4.3

LED and Manual Flow Control Register Synchronization

Since the defaults of the

and

are based on configuration straps, the EEPROM Loader reloads

these registers with their new default values.

8.4.5

Register Data

Optionally following the configuration strap values, the EEPROM data may be formatted to allow

access to the device’s parallel, directly writable registers. Access to indirectly accessible registers (e.g.

Switch Engine registers, etc.) is achievable with an appropriate sequence of writes (at the cost of

EEPROM space).

This data is first preceded with a Burst Sequence Valid Flag (EEPROM byte 12). If this byte has a

value of A5h, the data that follows is recognized as a sequence of bursts. Otherwise, the EEPROM

Loader is finished, will go into a wait state, and clear the

bit

in the

This can optionally generate an interrupt.

The data at EEPROM byte 13 and above should be formatted in a sequence of bursts. The first byte

is the total number of bursts. Following this is a series of bursts, each consisting of a starting address,

count, and the count x 4 bytes of data. This results in the following formula for formatting register data:

8-bits number_of_bursts

repeat (number_of_bursts)

16-bits {starting_address[9:2] / count[7:0]}

repeat (count)

8-bits data[31:24], 8-bits data[23:16], 8-bits data[15:8], 8-bits data[7:0]

Revision 1.3 (08-27-09)

DATASHEET

116

SMSC LAN9303/LAN9303i