USB 2.0 to 10/100 Ethernet Controller
Datasheet
Table 3.5 USB Pins
BUFFER
TYPE
AIO
Note:
NUM PINS
1
NAME
USB
DMINUS
USB
DPLUS
External USB
Bias Resistor.
USB PLL
Supply
SYMBOL
USBDM
DESCRIPTION
The functionality of this pin may be
swapped to USB DPLUS via the
PORT_SWAP configuration strap.
The functionality of this pin may be
swapped to USB DMINUS via the
PORT_SWAP configuration strap.
USBDP
AIO
Note:
1
1
USBRBIAS
AI
Used for setting HS transmit current level and on-
chip termination impedance. Connect to an
external 12K 1.0% resistor to ground.
This pin must be connected to VDDCORE for
proper operation.
Refer to
and the device reference schematic for
additional connection information.
VDDUSBPLL
P
1
Crystal Input
1
XI
ICLK
External 25 MHz crystal input.
Note:
This pin can also be driven by a single-
ended clock oscillator. When this
method is used, XO should be left
unconnected
1
Crystal
Output
XO
OCLK
External 25 MHz crystal output.
Table 3.6 Ethernet PHY Pins
BUFFER
TYPE
AIO
NUM PINS
1
NAME
Ethernet TX
Data Out
Negative
Ethernet TX
Data Out
Positive
Ethernet RX
Data In
Negative
Ethernet RX
Data In
Positive
SYMBOL
TXN
DESCRIPTION
The transmit data outputs may be swapped
internally with receive data inputs when Auto-
MDIX is enabled.
The transmit data outputs may be swapped
internally with receive data inputs when Auto-
MDIX is enabled.
The receive data inputs may be swapped
internally with transmit data outputs when Auto-
MDIX is enabled.
The receive data inputs may be swapped
internally with transmit data outputs when Auto-
MDIX is enabled.
1
TXP
AIO
1
RXN
AIO
1
RXP
AIO
SMSC LAN950x Family
DATASHEET
21
Revision 1.1 (04-18-13)
SMSC [ SMSC CORPORATION ]
