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USB3500 参数 Datasheet PDF下载

USB3500图片预览
型号: USB3500
PDF下载: 下载PDF文件 查看货源
内容描述: 高速USB主机,设备或OTG PHY采用UTMI +接口 [Hi-Speed USB Host, Device or OTG PHY With UTMI+ Interface]
分类和应用:
文件页数/大小: 46 页 / 719 K
品牌: SMSC [ SMSC CORPORATION ]
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Hi-Speed USB Host, Device or OTG PHY With UTMI+ Interface
Datasheet
Table 3.1 USB3500 Pin Definitions (continued)
DIRECTION,
TYPE
I/O,
Analog
Ground
N/A
Input
ACTIVE
LEVEL
N/A
N/A
N/A
N/A
PIN
12
13
14
15
NAME
DM
VSS
VDD3.3
XCVRSEL[1]
DESCRIPTION
D- pin of the USB cable.
PHY ground.
3.3V PHY Supply.
Transceiver Select. These signals select between
the FS and HS transceivers:
Transceiver select.
00: HS
01: FS
10: LS
11: LS data, FS rise/fall times
Charge VBUS through a resistor to VDD3.3.
0: do not charge VBUS
1: charge VBUS
Receive Active. Indicates that the receive state
machine has detected Start of Packet and is active.
Operational Mode. These signals select between
the various operational modes:
[1] [0] Description
0
0
0: Normal Operation
0
1
1: Non-driving (all terminations removed)
1
0
2: Disable bit stuffing and NRZI encoding
1
1
3: Reserved
ID Digital. Indicates the state of the ID pin.
0: connected plug is a mini-A
1: connected plug is a mini-B
ID Pull-up. Enables sampling of the analog ID line.
Disabling the ID line sampler will reduce PHY power
consumption.
0: Disable sampling of ID line.
1: Enable sampling of ID line.
PHY ground.
60MHz reference clock output. All UTMI+ signals are
driven synchronous to this clock.
PHY ground.
Line State. These signals reflect the current state of
the USB data bus in FS mode. Bit [0] reflects the
state of DP and bit [1] reflects the state of DM. When
the device is suspended or resuming from a
suspended state, the signals are combinatorial.
Otherwise, the signals are synchronized to CLKOUT.
[1] [0] Description
0
0
0: SEO
0
1
1: J State
1
0
2: K State
1
1
3: SE1
1.8V regulator output for digital circuitry on chip.
Place a 0.1uF capacitor near this pin and connect
the capacitor from this pin to ground. Connect pin 27
to pin 49.
16
CHRGVBUS
Input
High
17
18
19
RXACTIVE
OPMODE[1]
OPMODE[0]
Output
Input
Input
High
N/A
N/A
20
ID_DIG
Output
High
21
IDPULLUP
Input
High
22
23
24
25
26
VSS
CLKOUT
VSS
LINESTATE[1]
LINESTATE[0]
Ground
Output,
CMOS
Ground
Output
Output
N/A
N/A
N/A
N/A
N/A
27
VDD1.8
N/A
N/A
Revision 1.0 (04-04-05)
DATASHEET
12
SMSC USB3500