CXA2066S
Block Diagram
D/A CONVERTER
CSYNC
1
2
3
4
5
6
7
8
9
30
29
SDA
SCL
CONTRAST
I2C BUS
DECORDER
SUB CONTRAST (R)
SUB CONTRAST (G)
SUB CONTRAST (B)
OSD GAIN (R)
ABL
CUTOFF (R)
CUTOFF (G)
CUTOFF (B)
OSD GAIN (G)
OSD GAIN (B)
To each MODE switch
CUTOFF (RGB) BRIGHTNESS (RGB)
COF R
COF G
COF B
COF RGB
RIN
28 S/H-R
LPF
ROUT
27
Rch
SUB
CONTRAST
CONTRAST
26 GND-R
25 S/H-G
GAIN CONTROL
DATA
BLANKING
MODE
BRIGHTNESS
GAIN
CONTROL
AMP
BLANKING
BUFFER
AMP
BLANKING PULSE
OSD YS
OSD PULSE (13PIN)
YS PULSE (17PIN)
GENERATOR
24
GOUT
OSD GAIN (R)
OSD SW
VDET, SYNC SEP, SHARPNESS
SHARPNESS
VCC2
23 GND-G
22 VCC
5V
GIN
12V
GAIN CONT.
T SW
SYNC
SYNC IN 10
BIN 11
21
S/H-B
SEPARATOR
VDET
COMPARATOR
20 BOUT
Gch
GND-B
BLKING
YS
CLP 12
19
18
17
Same as R channel
Same as R channel
OSD-R 13
OSD-G 14
OSD-B 15
Bch
to
OSDSW
to
to
OSDSW
OSDSW
16 VDET
to
OSDSW
– 2 –
SONY [ SONY CORPORATION ]
