CXA3010Q
Pin Description
Pin
Pin
voltage
Symbol
No.
Equivalent circuit
Description
VCC
1
100k
Reduced voltage detection output.
POWER
ON
This is an open collector pin that outputs a
low signal when VCC is below the specified
value.
1
—
—
—
A.GND
VCC
Write data input.
1k
This pin is a Schmitt-type input that is
triggered when the logical voltage goes from
High to Low.
2
3
XWD
2
2.3V
A.GND
VCC
140
Read data output.
This pin is active when the logical voltage of
the write gate signal and the erase gate
signal is High.
3
RD
D.GND
Write current control. The write current
increases when the logical voltage is Low.
4
5
XCI
—
—
Write gate signal input. The write system
becomes active when the logical voltage is
Low.
XWG
Erase gate signal input. The erase system
becomes active when the logical voltage is
Low.
VCC
6
7
XEG
XS1
—
—
100k
4
Head side switching signal input. The
HEAD1 system is active when the logical
voltage is Low, and the HEAD0 system is
active when the logical voltage is High, but
only when the logical voltage for the write
gate and the erase gate is High.
5
6
7
8
9
1k
2.1V
A.GND
Filter inner track/outer track mode control.
Inner track mode is selected when the
logical voltage is Low.
8
9
OTF
XHD
—
—
Filter, time domain filter and write current
1M/2M mode control. 2M mode is selected
when the logical voltage is Low.
– 3 –
SONY [ SONY CORPORATION ]
