CXK77B3610GB
• AC Electrical Characteristics
Item
Address access (except Register-Register mode)
Clock period
Clock pulse high
Clock pulse low
Setup time
Hold time
Clock high to output (R-R mode)
Clock high to output (R-F mode, R-L mode)
Clock low to output (R-L mode)
Write cycle clock high to following Read cycle output
(R-F mode, R-L mode)
Clock high to output high impedance (S deselect cycle)
Write cycle clock high to output high impedance
(R-F mode, R-L mode)
Clock high to output low impedance
(R-R mode)
Clock high to output low impedance
(R-F mode)
Clock low to output low impedance (R-L mode)
Output enable to output valid (G)
Output enable to output in low Z (G)
Output disable to output in high Z (G)
Symbol
-6
Min.
—
6
2
2
0.5
1
1.5
∗
2
—
1.5
∗
2
Max.
9
—
—
—
—
—
3
6
3
15
1.5
1.5
1.5
2
1.5
—
1
—
3
3
—
—
—
3
—
3
1.5
1.5
1.5
2
1.5
—
1
—
Min.
—
7
3
3
1
1
1.5
∗
2
—
1.5
∗
2
-7
Max.
10
—
—
—
—
—
3.5
7
3.5
17
3.5
3.5
—
—
—
3.5
—
3.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
AA
t
KP
t
KH
t
KL
t
S
t
H
t
KQ
t
KQ1
t
KQ2
t
KQ3
t
HZ
∗
2
t
WHZ
∗
2
t
LZ
∗
2
t
LZ1
∗
2
t
LZ2
∗
2
t
OE
t
OLZ
∗
2
t
OHZ
∗
2
∗
1
All parameters are specified over the range 0 to 70°C.
∗
2
These parameters are sampled and are not 100% tested.
AC characteristics
• AC test conditions
Item
Input pulse high level
Input pulse low level
Input rise & fall time
Input reference level
Clock input reference level
Clock input differential signal
Clock input rise & fall time
Output reference level
Output load conditions
(V
DD
= 3.3V ± 0.15V, Ta = 0 to 70°C)
Conditions
V
IH
= 2.4V
V
IL
= 0.4V
1V/ns
2.0/0.8V
K/K cross;
C/C cross
0.8V
1V/ns
1.4V
Fig. 1
–6–
∗
1
Including scope and jig capacitance.
∗
2
For
t
LZ
,
t
HZ
.
Fig. 1.
I/O
50Ω
50Ω
1.4V
I/O
5pF
∗
1
1178Ω
Output Load (1)
Output Load (2)
∗
2
3.3V
868Ω
SONY [ SONY CORPORATION ]
