ICX229AK
(3) Horizontal transfer clock waveform
tr
twh
tf
90%
Vφ
H
10%
V
HL
twl
(4) Reset gate clock waveform
tr
twh
tf
V
RGH
twl
Point A
RG waveform
V
RGLH
V
RGL
V
RGLL
V
RGLm
Hφ
1
waveform
Vφ
H
/2 [V]
Vφ
RG
V
RGLH
is the maximum value and V
RGLL
is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG. In addition, V
RGL
is the average value of V
RGLH
and
V
RGLL
.
V
RGL
= (V
RGLH
+ V
RGLL
)/2
Assuming V
RGH
is the minimum value during the interval twh, then:
Vφ
RG
= V
RGH
– V
RGL
Negative overshoot level during the falling edge of RG is V
RGLm
.
(5) Substrate clock waveform
100%
90%
φM
Vφ
SUB
10%
0%
(A bias generated within the CCD)
V
SUB
φM
2
tf
tr
twh
–6–