ILX103A
Input Clock Voltage Condition
Item
V
IH
V
IL
Min.
3.0
0.0
Typ.
V
DD
—
Max.
5.5
0.1
Unit
V
V
∗
This is applied to the all external pulses.
(φCLK,
φROG, φSHUT)
φCLK
Timing
(For all modes)
t1
φCLK
t3
t2
t4
Item
φCLK
pulse rise/fall time
φCLK
pulse Duty
∗
1
∗
1
100
×
t
4/ (
t
3 +
t
4)
Symbol
Min.
0
Typ.
10
50
Max.
100
60
Unit
ns
%
t
1,
t
2
—
40
φROG, φCLK
Timing
φROG
t6
t7
t8
φCLK
t5
t9
Item
φROG, φCLK
pulse timing 1
φROG, φCLK
pulse timing 2
φROG
pulse rise/fall time
φROG
pulse period
Note)
τ
is the period of
φCLK.
–5–
Symbol
Min.
1/8τ
1/8τ
0
6τ
Typ.
1/4τ
1/4τ
10
10τ
Max.
3/8τ
3/8τ
100
20τ
Unit
ns
ns
ns
ns
t
5
t
9
t
6,
t
8
t
7