ILX103A 参数 Datasheet PDF下载

ILX103A

Application Circuit

(Output gain low mode)

∗

1

φSHUT

φROG

φCLK

SWG

GND

GND

GND

Vout

Vgg

V

DD

V

DD

∗

2

V

DD

NC

NC

1

2

3

4

5

6

7

8

9 10 11 12 13 14 15 16

0.01µ

22µ/10V

1µ/16V

Signal output

3kΩ

1000p

2SA1175

φCLK

φROG φSHUT

∗

1

This circuit diagram is the case when output circuit gain is low.

∗

2

Connect T1 (Pin 13) to GND with 1000pF capacitor.

Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for

any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

–7–

NC

5V

T1