A d v a n c e
I n f o r m a t i o n
If the output is low (Busy), the device is actively erasing or programming. (This includes program-
ming in the Erase Suspend mode.) If the output is high (Ready), the device is ready to read array
data (including during the Erase Suspend mode), or is in the standby mode.
Table 18 on page 44
shows the outputs for RY/BY#. Figures
Figure 14, on page 50, Figure 15, on
page 51, Figure 18, on page 55
and
Figure 19, on page 56
shows RY/BY# for read, reset, pro-
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or
complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read
at any address, and is valid after the rising edge of the final WE# pulse in the command sequence
(prior to the program or erase operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any ad-
dress cause DQ6 to toggle. (The system may use either OE# or CE# to control the read cycles.)
When the operation is complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6
toggles for approximately 100 µs, then returns to reading array data. If not all selected sectors
are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the
selected sectors that are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or
is erase-suspended. When the device is actively erasing (that is, the Embedded Erase algorithm
is in progress), DQ6 toggles. When the device enters the Erase Suspend mode, DQ6 stops tog-
gling. However, the system must also use DQ2 to determine which sectors are erasing or erase-
suspended. Alternatively, the system can use DQ7 (see the subsection on
DQ7: Data# Polling on
page 39).
program command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embed-
ded Program algorithm is complete.
Table 18 on page 44
shows the outputs for Toggle Bit I on DQ6.
Figure 7, on page 43
shows the
toggle bit algorithm in flowchart form, and the section
Reading Toggle Bits DQ6/DQ2 on page 42
explains the algorithm.
Figure 22, on page 57
shows the toggle bit timing diagrams.
on page 58
shows the differences between DQ2 and DQ6 in graphical form. See also the subsec-
DQ2: Toggle Bit II
The
Toggle Bit II
on DQ2, when used with DQ6, indicates whether a particular sector is actively
erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is erase-
suspended. Toggle Bit II is valid after the rising edge of the final WE# pulse in the command
sequence.
DQ2 toggles when the system reads at addresses within those sectors that have been selected
for erasure. (The system may use either OE# or CE# to control the read cycles.) But DQ2 cannot
distinguish whether the sector is actively erasing or is erase-suspended. DQ6, by comparison, in-
dicates whether the device is actively erasing, or is in Erase Suspend, but cannot distinguish
which sectors are selected for erasure. Thus, both status bits are required for sector and mode
information. Refer to
Table 18 on page 44
to compare outputs for DQ2 and DQ6.
Figure 7, on page 43
shows the toggle bit algorithm in flowchart form, and the section
Reading
Toggle Bits DQ6/DQ2 on page 42
explains the algorithm. See also the
DQ6: Toggle Bit I
subsec-
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