D at a
S hee t
(Adva nce
In for m ation)
Table 10.4
Secured Silicon Sector Exit
(LLD Function = lld_SecSiSectorExitCmd)
Cycle
Unlock Cycle 1
Unlock Cycle 2
Exit Cycle 3
Exit Cycle 4
Note
Base = Base Address.
/* Example: SecSi Sector
*( (UINT16 *)base_addr
*( (UINT16 *)base_addr
*( (UINT16 *)base_addr
*( (UINT16 *)base_addr
Exit Command */
+ 0x555 ) = 0x00AA;
+ 0x2AA ) = 0x0055;
+ 0x555 ) = 0x0090;
+ 0x000 ) = 0x0000;
Operation
Write
Write
Write
Write
Byte Address
Base + AAAh
Base + 555h
Base + AAAh
Base + AAAh
Word Address
Base + 555h
Base + 2AAh
Base + 555h
Base + 000h
Data
00AAh
0055h
0090h
0000h
/*
/*
/*
/*
write
write
write
write
unlock cycle
unlock cycle
SecSi Sector
SecSi Sector
1
2
Exit cycle 3
Exit cycle 4
*/
*/
*/
*/
11. Electrical Specifications
11.1
Absolute Maximum Ratings
Description
Storage Temperature, Plastic Packages
Ambient Temperature with Power Applied
All Inputs and I/Os except as noted below
(Note 1)
Voltage with Respect to Ground
V
CC
(Note 1)
V
IO
A9 and ACC (Note 2)
Output Short Circuit Current (Note 3)
Rating
–65°C to +150°C
–65°C to +125°C
–0.5 V to V
CC
+ 0.5 V
–0.5 V to +4.0 V
–0.5V to +4.0V
–0.5 V to +12.5 V
200 mA
Notes
1. Minimum DC voltage on input or I/Os is –0.5 V. During voltage transitions, inputs or I/Os may undershoot V
SS
to –2.0 V for periods of up
to 20 ns. See
Maximum DC voltage on input or I/Os is V
CC
+ 0.5 V. During voltage transitions inputs or I/Os may overshoot to
V
CC
+ 2.0 V for periods up to 20 ns. See
2. Minimum DC input voltage on pins A9 and ACC is -0.5V. During voltage transitions, A9 and ACC may overshoot V
SS
to –2.0 V for periods
of up to 20 ns. See
Maximum DC voltage on pins A9 and ACC is +12.5 V, which may overshoot to 14.0 V for periods up to 20
ns.
3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second.
4. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only;
functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not
implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.
Figure 11.1
Maximum Negative Overshoot Waveform
20 ns
+0 .8 V
–0 .5 V
–2 .0 V
20 n
s
20 ns
November 21, 2006 S29GL-P_00_A3
S29GL-P MirrorBit
TM
Flash Family
47