Data
She et
14. Test Conditions
Figure 14.1
Test Setup
3.3 V
2.7 kΩ
Device
Under
Test
C
L
6.2 kΩ
Note
Diodes are IN3064 or equivalent.
Table 14.1
Test Specifications
Test Condition
Output Load
Output Load Capacitance, C
L
(including jig capacitance)
Input Rise and Fall Times
Input Pulse Levels
Input timing measurement reference levels
Output timing measurement reference levels
30
5
0.0 or V
IO
0.5 V
IO
0.5 V
IO
All Speeds
1 TTL gate
pF
ns
V
V
V
Unit
14.1
Key to Switching Waveforms
Waveform
Inputs
Steady
Outputs
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
Figure 14.2
Input Waveforms and Measurement Levels
VCC
0.0 V
Input
0.5 V
IO
Measurement Level
0.5 V
IO
Output
November 16, 2007 S29GL-N_01_09
S29GL-N MirrorBit
®
Flash Family
63