Data
She et
16. Erase And Programming Performance
Parameter
Sector Erase Time
S29GL032N
Chip Erase Time
Total Write Buffer Program Time (Notes
3, 5)
Total Accelerated Effective Write Buffer Program Time (Notes
Chip Program Time
S29GL032N
S29GL064N
S29GL064N
Typ
0.5
32
64
240
200
31.5
63
Max
3.5
64
128
µs
sec
Unit
Comments
Excludes 00h
programming prior
to erasure
Excludes system
level overhead
sec
Notes
1. Typical program and erase times assume the following conditions: 25°C, V
CC
= 3.0V, 10,000 cycles; checkerboard data pattern.
2. Under worst case conditions of 90
°
C; Worst case V
CC
, 100,000 cycles.
3. Programming time (typ) is 15
μs
(per word), 7.5
μs
(per byte).
4. Accelerated programming time (typ) is 12.5
μs
(per word), 6.3
μs
(per byte).
5. Write buffer Programming time is calculated on a per-word/per-byte basis for a 16-word/32-byte write buffer operation.
6. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
7. System-level overhead is the time required to execute the command sequence(s) for the program command. See
and
for further information on command definitions.
Table 16.1
TSOP Pin and BGA Package Capacitance
Parameter Symbol
C
IN
C
OUT
C
IN2
C
IN3
Notes
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25°C, f = 1.0 MHz.
Parameter Description
Input Capacitance
V
IN
= 0
Test Setup
TSOP
BGA
TSOP
BGA
TSOP
BGA
TSOP
BGA
Typ
6
TBD
6
TBD
6
TBD
27
TBD
Max
10
TBD
12
TBD
10
TBD
30
TBD
Unit
pF
pF
pF
pF
pF
pF
pF
pF
Output Capacitance
V
OUT
= 0
V
IN
= 0
V
IN
= 0
Control Pin Capacitance
#RESET, #WP/ACC Pin Capacitance
November 16, 2007 S29GL-N_01_09
S29GL-N MirrorBit
®
Flash Family
73
SPANSION [ SPANSION ]
