D a t a
S h e e t
Table 13.
Cycles
Command Sequence
(Notes)
Command Set Entry (5)
Lock
Program (6)
Register
Read (6)
Bits
Command Set Exit (7)
Command Set Entry (5)
Program (8)
Password
Read (9)
Protection
Unlock (10)
Command Set Exit (7)
Command Set Entry (5)
PPB Program (11)
Non-Volatile
Sector
All PPB Erase (11,
Protection (PPB) PPB Status Read
Command Set Exit (7)
Global
Command Set Entry (5)
Volatile Sector PPB Lock Bit Set
Protection
PPB Lock Bit Status Read
Freeze
Command Set Exit (7)
(PPB Lock)
Volatile Sector
Protection
(DYB)
Command Set Entry (5)
DYB Set
DYB Clear
DYB Status Read
Command Set Exit (7)
Sector Protection Commands (x16)
Second
Addr
Data
2AA
55
XXX
Data
XX
2AA
PWAx
01
00
XX
2AA
SA
00
XX
2AA
XX
XX
2AA
SA
SA
XX
00
55
PWDx
PWD1
03
00
55
00
30
00
55
00
00
55
00
01
00
555
E0
Bus Cycles (Notes
Third
Fourth
Fifth
Addr
Data Addr Data Addr Data
555
40
Sixth
Addr Data
Seventh
Addr Data
3
2
1
2
3
2
4
7
2
3
2
2
1
2
3
2
1
2
3
2
2
1
2
First
Addr Data
555
AA
XX
A0
00
Data
XX
90
555
AA
XX
A0
XXX PWD0
00
25
XX
90
555
AA
XX
A0
XX
80
SA
RD(0)
XX
90
555
AA
XX
A0
XXX RD(0)
XX
555
XX
XX
SA
XX
90
AA
A0
A0
RD(0)
90
555
02
00
555
60
PWD2
PWD0
C0
03
01
PWD3
PWD1
02
PWD2
03
PWD3
00
29
555
50
Legend:
X = Don’t care.
RA = Address of the memory location to be read.
SA = Sector Address. Any address that falls within a specified sector.
See Tables
for sector address ranges.
Notes:
1. All values are in hexadecimal.
2. Shaded cells indicate read cycles.
3. Address and data bits not specified in table, legend, or notes are
don’t cares (each hex digit implies 4 bits of data).
4. Writing incorrect address and data values or writing them in the
improper sequence may place the device in an unknown state.
The system must write the reset command to return the device
to reading array data.
5. Entry commands are required to enter a specific mode to enable
instructions only available within that mode.
PWA = Password Address. Address bits A1 and A0 are used to select
each 16-bit portion of the 64-bit entity.
PWD = Password Data.
RD(0) = DQ0 protection indicator bit. If protected, DQ0 = 0. If
unprotected, DQ0 = 1.
6.
7.
8.
No unlock or command cycles required when bank is reading
array data.
Exit command must be issued to reset the device into read
mode; device may otherwise be placed in an unknown state.
Entire two bus-cycle sequence must be entered for each portion
of the password.
9. Full address range is required for reading password.
10. Password may be unlocked or read in any order. Unlocking
requires the full password (all seven cycles).
11. ACC must be at V
IH
when setting PPB or DYB.
12. “All PPB Erase” command pre-programs all PPBs before erasure
to prevent over-erasure.
64
S29GL-N MirrorBit™ Flash Family
S29GL-N_00_B3 October 13, 2006
SPANSION [ SPANSION ]
