D at a
S hee t
(Adva nce
In for m ation)
2.
Ordering Information
The order number is formed by a valid combinations of the following:
S71WS
256
N
C
0
BA
W
A
K
0
Packing Type
0 = Tray
2 = 7” Tape and Reel
3 = 13” Tape and Reel
RAM Supplier, DYB Power Up, Speed Combinations
K = 2 = CellularRAM 2, 0, 54 MHz
P = 2 = CellularRAM 2, 1, 54 MHz
J = 2 = CellularRAM 2, 0, 66 MHz
N = 2 = CellularRAM 2, 1, 66 MHz
H = 2 = CellularRAM 2, 0, 80 MHz
M = 2 = CellularRAM 2, 1, 80 MHz
Package Modifier
A = 8x11.6x1.2 mm, 84-ball FBGA
T = 8x11.6x1.4 mm, 84-ball FBGA
E = 9x12x1.4 mm, 84-ball FBGA
Y = 9x12x1.2 mm, 84-ball FBGA
Temperature Range
W = Wireless (-25°C to +85°C)
Package Type
BA = Very Thin FIne-Pitch BGA, Lead (Pb)-free Compliant Package
BF = Very Thin FIne-Pitch BGA, Lead (Pb)-free Package
Chip Contents—2
No content
pSRAM Density
B = 32 Mb
C = 64 Mb
D = 128 Mb
Process Technology
N = 110-nm MirrorBit™ Technology
Code Flash Density
512= 512 Mb (2x256Mb)
256= 256 Mb
128= 128 Mb
Product Family
S71WS = Multi-Chip Product, 1.8 Volt-only Simultaneous Read/Write Burst
Mode Flash Memory + pSRAM
2.1
Valid Combinations
Valid Combinations list configurations planned to be supported in volume for this device. Consult your local
sales office to confirm availability of specific valid combinations and to check on newly released
combinations.
Table 2.1
MCP Configurations and Valid Combinations
Valid Combinations
B
S71WS128N
C
C
S71WS256N
D
C
S71WS512N
D
Package Marking Note:
The package marking omits the leading
S
from the ordering part number.
T
E
J, N, H, M
K, P, J, N, H, M
0
BAW, BFW
Y
A
K, P, J, N, H, M
K, P, H, M
A
A
K, P, J, N, H, M
K, P, J, N, H, M
A
K, P, J, N, H, M
July 19, 2006 S71WS-N_00_A6
S71WS-N
3
SPANSION [ SPANSION ]
