CY28324
Data Byte 8
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
--
--
--
--
--
--
--
--
Reserved
Reserved
WD_TIMER4
WD_TIMER3
WD_TIMER2
WD_TIMER1
WD_TIMER0
WD_PRE_SCALER
Name
Reserved
Reserved
These bits store the time-out value of the Watchdog Timer.
The scale of the timer is determine by the prescaler.
The timer can support a value of 150 ms to 4.8 sec when
the prescalar is set to 150 ms. If the prescaler is set to 2.5
sec, it can support a value from 2.5 sec. to 80 sec.
When the Watchdog Timer reaches “0,” it will set the
WD_TO_STATUS bit and generate Reset if RST_EN_WD
is enabled.
0 = 150 ms
1 = 2.5 sec
Pin Description
Power-On
Default
0
0
1
1
1
1
1
0
Data Byte 9
Bit
Bit 7
Pin#
--
Name
48MHz_DRV
Pin Description
48MHz & 24_48MHz clock output drive strength
0 = Normal
1 = High Drive
(Recommend to set to high drive if this output is being used
to drive both USB and SIO devices in Intel® Brookdale - G
platforms)
PCI clock output drive strength
0 = Normal
1 = High Drive
3V66 clock output drive strength
0 = Normal
1 = High Drive
This bit will enable the generation of a Reset pulse when a
Watchdog Timer time-out occurs.
0 = Disabled
1 = Enabled
This bit will enable the generation of a Reset pulse after a
frequency change occurs.
0 = Disabled
1 = Enabled
Watchdog Timer Time-out Status bit
0 = No time-out occurs (READ); Ignore (WRITE)
1 = Time-out occurred (READ); Clear WD_TO_STATUS
(WRITE)
0 = Stop and reload Watchdog Timer
1 = Enable Watchdog Timer. It will start counting down after
a frequency change occurs.
Note:
CY28324 will generate system reset, reload a
recovery frequency, and lock itself into a recovery
frequency mode after a Watchdog Timer time-out occurs.
Under recovery frequency mode, CY28324 will not respond
to any attempt to change output frequency via the SMBus
control bytes. System software can unlock CY28324 from
its recovery frequency mode by clearing the WD_EN bit.
Reserved
Power-On
Default
0
Bit 6
--
PCI_DRV
0
Bit 5
--
3V66_DRV
0
Bit 4
--
RST_EN_WD
0
Bit 3
--
RST_EN_FC
0
Bit 2
--
WD_TO_STATUS
0
Bit 1
--
WD_EN
0
Bit 0
--
Reserved
0
Rev 1.0, November 20, 2006
Page 9 of 21
SPECTRALINEAR [ SPECTRALINEAR INC ]
