CY28354-400
Layout Example for DDR 2.5V
FB
10 mF
0.005 mF
VDDQ2
C3
G
C4 G
G
G
G
G
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
V
G
G
V
G
G
V
G
G
V
G
48
G
47
46
45
44
43
42
41
G
40
V
39
G
38
37
36
35
G
34
V
33
G
32
31
30
29
V
28
G
27
26
G
25
V
G
FB = Dale ILB1206 - 300 (300 @ 100 MHz) or TDK ACB 2012L-120
C4 = 0.005 F
Ceramic Caps C3 = 10–22 F
G = VIA to GND plane layer
V =VIA to respective supply plane layer
Note: Each supply plane or strip should have a
ferrite bead and capacitors
All bypass caps = 0.1 F ceramic
CY28354-400
G
G
G
Ordering Information
Ordering Code
Lead Free
CY28354OXC–400
CY28354OXC–400T
48-pin SSOP
48-pin SSOP – Tape and Reel
Commercial, 0°C to 85 °C
Commercial, 0°C to 85 °C
Package Type
Operating Range
Rev 1.0, November 22, 2006
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