欢迎访问ic37.com |
会员登录 免费注册
发布采购

CY28404OXCT 参数 Datasheet PDF下载

CY28404OXCT图片预览
型号: CY28404OXCT
PDF下载: 下载PDF文件 查看货源
内容描述: CK409兼容的时钟合成器 [CK409-Compliant Clock Synthesizer]
分类和应用: 晶体外围集成电路光电二极管时钟
文件页数/大小: 19 页 / 216 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
 浏览型号CY28404OXCT的Datasheet PDF文件第1页浏览型号CY28404OXCT的Datasheet PDF文件第3页浏览型号CY28404OXCT的Datasheet PDF文件第4页浏览型号CY28404OXCT的Datasheet PDF文件第5页浏览型号CY28404OXCT的Datasheet PDF文件第6页浏览型号CY28404OXCT的Datasheet PDF文件第7页浏览型号CY28404OXCT的Datasheet PDF文件第8页浏览型号CY28404OXCT的Datasheet PDF文件第9页  
CY28404
Pin Description
Pin No.
1, 2, 48
1, 2, 7, 8, 9
4
Name
REF(0:2)
FS_A, FS_B, FS_C, I
FS_D, FS_E
XIN
I
Type
O, SE
Description
Reference Clock.
3.3V 14.318 MHz clock output.
3.3V LVTTL Latched Input for CPU Frequency Selection.
Crystal Connection or External Reference Frequency Input.
This pin has
dual functions. It can be used as an external 14.318 MHz crystal connection or
as an external reference frequency input.
Crystal Connection.
Connection for an external 14.318 MHz crystal output.
CPU Clock Output.
Differential CPU clock outputs.
CPU Clock Output.
Differential CPU clock outputs.
Do Not Connect
O, SE
I/O, SE
PD
I/O, SE
PU
66 MHz Clock Output.
3.3V 66 MHz clock from internal VCO.
48 or 66 MHz Clock Output.
3.3V selectable through external SELVCH
strapping resistor and SMBus to be 66 MHz or 48 MHz. Default is 66 MHz.
0 = 66 MHz, 1 = 48 MHz
66 MHz Clock Output.
3.3V 66 MHz clock from internal VCO. Reset or
Power-down Mode Select. Selects between RESET# output or PWRDWN#
input for the PWRDWN#/RESET# pin. Default is RESET#. 0 = PD, 1 = RESET.
PCI Clock Output.
33 MHz clocks divided down from 3V66.
Fixed 48 MHz Clock Output.
Fixed 48 MHz Clock Output.
Current Reference.
A precision resistor is attached to this pin which is
connected to the internal current reference.
3.3V LVTTL Input for PowerDown# active LOW.
Watchdog Time-out Reset
Output.
24 or 48 MHz Output.
3.3V fixed 24 MHz or 48 MHz non-spread spectrum
output selectable through an external power-on strapping resistor tied to this
pin. 0 = 24 MHz, 1 = 48 MHz
3.3V LVTTL Input is a Level Sensitive Strobe used to Latch the FS[A:E]
Input (active LOW).
SMBus-compatible SDATA.
SMBus-compatible SCLOCK.
3.3V Power Supply for PLL.
Ground for PLL.
3.3V Power Supply for Outputs.
Ground for Outputs.
5
40, 43
39, 42
37, 36
30, 31
26
XOUT
CPUT(0:1)
CPUC(0:1)
DNC
3V66(0:1)
3V66_3/VCH/
SELVCH
3V66_2/MODE
O, SE
O, DIF
O, DIF
27
7, 8, 9
PCI_F(0:2)
O, SE,PU
Free Running PCI Output.
33 MHz clocks divided down from 3V66.
O, SE
O, SE
O, SE
I
I/O, PU
I/O, SE
PU
I
I/O
I
PWR
GND
PWR
GND
12, 13, 14, 15, PCI(0:5)
18, 19
23
22
45
20
21
USB_48
DOT_48
IREF
RESET#/PD#
SEL24#/
24_48MHz
VTT_PWRGD#
SDATA
SCLK
VDDA
VSSA
VDD(REF,PCI,48,3
V66,CPU),
VSS(REF,PCI,48,3V
66,CPU,ITP)
34
33
32
47
46
3, 10, 16, 25,
28, 35, 41
6, 11, 17, 29,
38, 44, 46
Rev 1.0, November 22, 2006
Page 2 of 19