CY2SSTV16859
DC Electrical Specifications
(continued)
Parameter
I
DDD
Description
Condition
VDD
2.7V
Min.
–
Typ.
[9]
30.0
Max.
–
Unit
µA/
clock
MHz
µA/
clock
MHz
/data
input
RESET# = V
DD
, V
I
= V
IH(AC)
or V
IL(AC),
I
O
= 0
Dynamic
operating – clock CLK and CLK# switching 50% duty
only
cycle
Dynamic
operating – per
each data input
RESET# = V
DD
, V
I
= V
IH(AC)
or V
IL(AC),
CLK and CLK# switching 50% duty
cycle. One data input switching at half
clock frequency, 50% duty cycles.
I
OH
= –20 mA
I
OL
= 20 mA
2.7
–
15.0
–
r
OH
r
OL
r
O(
C
i
)
Output high
Output low
2.3 to 2.7V
2.3 to 2.7V
2.5V
2.5
2.5
2.5
7
7
–
2.5
2.5
2.5
–
–
–
–
–
–
20
20
4
3.5
3.5
3.5
pF
pF
pF
|r
OH
– r
OL
| each I
O
= 20 mA, T
A
= 25°C
separate bit
Data Inputs
CLK and CLK#
RESET#
V
I
= V
REF
+ 310 mV
V
ICR
= 1.25V, V
I(PP)
= 360 mV
V
I
= V
DD
or V
SS
AC Electrical Specifications
V
DD
= 2.5V± 0.2V
Parameter
f
clock
t
w
t
act
t
inact
t
su
t
h
Clock Frequency
Pulse duration, CLK, CLK# high or low
Differential inputs active time (data inputs must be held low after RESET# is taken high).
Differential inputs inactive time (data and clock inputs must be held at valid levels
(not floating) after RESET# is taken low).
Set-up time, fast slew rate
[10, 12]
Set-up time, slow slew
Hold time, fast slew
Hold time, slow slew
rate
[11, 12]
Data after CLK , CLK#
rate
[10, 12]
rate
[11, 12]
Data before CLK , CLK#
Description
Min.
–
2.0
–
–
0.75
0.9
0.75
0.9
Max.
280
–
22
22
–
–
–
–
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
Table 2. Switching Characteristics Over Recommended Operating Conditions
[13]
Parameter
f
max
t
PHL
t
PD
RESET#
CLK and CLK#
Q
Q
1.1
From (Input)
To (Output)
V
DD
= 2.5V ± 0.2V
Min.
280
Max.
–
5
2.8
MHz
ns
ns
Unit
Notes:
10. For data signal input slew rate
V/ns.
11. For data signal input slew rate V/ns and
V/ns.
12. CLK and CLK# signals input slew rates are 1 V/ns.
13. See test circuits and waveforms. TA = 0°C to +85°C.
Rev 1.0, November 21, 2006
Page 4 of 7
SPECTRALINEAR [ SPECTRALINEAR INC ]
